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Question

why is B wrong? as far as i know DRAM has less number of gates and hence its cheaper. but static RAM contains many gates per bit

Comments

can i know what is the ans?

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given is option A

Answer 1

Ans- B is false here.

 1. SRAM is static while DRAM is dynamic
 2. SRAM is faster compared to DRAM
 3. SRAM consumes less power than DRAM
 4. SRAM uses more transistors per bit of memory compared to DRAM
 5. SRAM is more expensive than DRAM
 6. Cheaper DRAM is used in main memory while SRAM is commonly used in the cache memory.
 7. DRAM requires the data to be refreshed periodically in order to retain the data. SRAM does not need to be refreshed as the transistors inside would continue to hold the data as long as the power supply is not cut off. This behavior leads to a few advantages, not the least of which is the much faster speed that data can be written and read.

Answer 2

I will go with option "D" here bcoz all A,B,C are true also DRAM does "refreshing" per second which need for computer to do task efficiently and SRAM is costlier than DRAM so in general purpose computer which doesn't need to be very fast we can perform task with DRAM also

Answer 3

Answer should be C, as read cycle itself refreshes the value. we don't need a memory refresh cycle again.

https://gateoverflow.in/?qa=blob&qa_blobid=12537040844512335301

the memory on a dynamic RAM memory chip is organized in a matrix formed by rows and columns of memory cells. The simplest type of dynamic RAM cell contains only one transistor and one capacitor.  Whether a 1 or 0 is contained in a cell is determined by whether or not there is a charge on the capacitor. During a read operation, one of the row select lines is brought high by decoding the row address (low-order address bits). The activated row select line turns on the switch transistors  for all cells in the selected row. This causes the refresh amplifier associated with each column to sense the voltage level on the corresponding capacitor and interpret it as a 0 or a 1. If it is more than 50 percent, it reads it as a 1; otherwise it reads it as a 0. The column address (high-order address bits) enables one cell in the selected row for the output. The read cycle is actually a read/write cycle. If a '1' is read then the cell is re-written to with a '1' to recharge it. However if a '0' is read no recharge is necessary.