DMA anc CPU idle time

Question

Which of the following statements is / are true?

A. In DMA approach CPU never gets idle for data transfer.

B. In DMA approach, CPU becomes idle whenever DMA controller steals cycle.

C. In DMA approach,DMA controller accepts a data transfer request only after completing last data transfer request

D. In DMA approach, CPU can proceed in parallel, only if next instructions do not need bus

Comments

I think C) and D)

---

i think A and D

Answer 1

Ans: D

A] If DMA is in burst mode then CPU gets idle while data being transfered.

B] In cycle stealing mode, DMA gets access over bus whenever CPU is busy executing instruction. That is, when CPU is in execute phase of instruction, it doesn't need bus. So this cycle is stolen by DMA to transfer data. Clearly, in this time CPU is not idle.

C] DMA controller maintains queue of data requests.So it accepts a data transfer request but process it only after completing last data transfer request.

D] It is correct.

Answer 2

Option D

 In DMA approach, CPU can proceed in parallel, only if next instructions do not need bus