Consider a machine with 5-stage pipeline with 1ns clock cycle. The second machine with 12-stage pipeline with a 0.6ns clock cycle. The 5-stage pipeline experiences a stall due to data hazard for every 5 instructions, whereas 12 stage pipeline experiences 3 stalls for every 8 instructions. Branch instructions constitute 20% of the total instructions , and misprediction rate for both machines is 5%.
1.What is the speed up of 12-stage pipeline over 5 stage pipeline considering only data hazards?
2.If the branch mispredict penalty for the first machine is 2 cycles but the second machine is 5 cycles, what is the speed up of 12-stage pipeline over 5 stage pipeline?