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A computer system implements a $40\;\text{-bit}$ virtual address, page size of $8\;\text{kilobytes}$, and a $128\text{-entry}$ translation look-aside buffer $\text{(TLB)}$ organized into $32$ sets each having $4$ ways. Assume that the $\text{TLB}$ tag does not store any process id. The minimum length of the $\text{TLB}$ tag in bits is ______.
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77 votes

Ans $40 - (5+13) = 22$ bits

$\text{TLB}$ maps a virtual address to the physical address of the page. (The lower bits of page address (page offset bits) are not used in $\text{TLB}$ as they are the same for virtual as well as physical addresses). Here, for $8\;\textsf{KB}$ page size we require $13$ page offset bits.

In $\text{TLB}$ we have $32$ sets and so virtual address space is divided into $32$ using $5$ set bits. (Associativity doesn't affect the set bits as they just adds extra slots in each set).

So, $\text{number of tag bits} = 40 - 5 - 13 = 22$

Following diagram shows how $\text{TLB}$ and Cache works:

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Here is another way to look at it.

The lower bits of page address (page offset bits) are not used in TLB as they are the same for virtual as well as physical addresses.

remaining bits = 40-13=27

So total entries in a page table (let there be one in place of a TLB) = 2^27

So now, we want to map this Page Table to a TLB with 128 entries by the use of a 4-way set-associative mapping.

For mapping purpose,take the Page Table as main memory and TLB as cache memory and the size of a block as x.

So total number of bits for main memory are 27+x.

Now mapping MM 4-way set associatively to CM gives (tag-set-word) as (22-5-x).

So the number of tag bits are 22

2 votes
2 votes
Total virtual address size = 40

Since there are 32 sets, set offset = 5

Since page size is 8kilobytes, word offset = 13

Minimum tag size = 40 - 5- 13 = 22
Answer:

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