cache

Question

Consider a system, the average memory access time of a processor with one level (L1) cache is 2.4. If the required data present in L1-cache it can be accessed in 1 clock cycle otherwise it needs 80 clock cycles to get it from memory. Designers in order to improve the average memory access time, they are considering adding second level(L2) cache. The access time of L2-cache is 6 clock cycles. Even after adding L2-cache, memory access still takes same. What is the hit rate of L2-cache such that average memory access improved by 65%?

Comments

ans is 75%

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What are other options? I got 76% using Simultaneous access.

Answer 1

Memory Access Time of processor with L1 cache is 2.4

L1 cache hit takes 1 clock cycle

L1 cache miss takes 80 clock cycle.

So, we know

Effective Memory Access Time= $L1_{\text{cache hit}} \times L1_{\text{cache access time}}+ L1_{\text{cache miss}} \times (L1_{\text{cache access}}+MM_{\text{access}})$

$2.4=h1 \times 1 + (1-h1) \times 81$

$\implies h1=0.9825$

In 2nd level cache access improvement of memory access 0.65. This means we got a speedup of 65% or the new speed in 1.65 times the old one. (Remember speed up can go even > 2 meaning an improvement of time by more than 100%. So, this formula is a bit counter intuitive)

So, $\frac{\text{Old time}}{\text{New Time}} =  1.65$.

New Time = 1.4545

Say, 2nd level of cache hit h2

We can say,

$1.4545=h1 \times 1 +  (1-h1) \times h2 \times (6+1) + (1-h1)(1-h2)\times (80+6+1)$

$1.4545=.9825 +  0.0175 \times h2 \times 6+1 + 0.0175 (1-h2)\times (87)$

$0.472=  0.1225 h2  + 1.5225 - 1.5225h2$

$h2= \frac{1.0505}{1.4}$

$h2\approx 75\%$

Comments

65% improvement means,

Now, it is working on 35% of previous time, rt?

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@sreshtha. Yes.

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How can you say it is hierarchical access not simultaneous? For Simultaneous access, is there any identifying sentence(like for Hierarchical it is"check a block in L1 if not found then go to memory and bring it to L1) or it would be explicitly mentioned?

For me, it seems Simultaneous access because it is said that check L1 otherwise take it from memory.

Please help me with this doubt.

I got 76% using Simultaneous access.

Answer 2

Let, H1 be the hit rate of L1 cache.

So, 2.4 = H1(1) + (1-H1)(1 + 80).........given

So, H1 = 0.98

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Now, lets consider average access time of L2 cache. Let, H2 be the hit rate of L2 cache.

Average L2 access time

= H2(L2 access time) + (1-H2)(Memory access time + L2 access time)

= H2(6) + (1-H2)(6 + 80)

= -80H2 + 86      ................................(1)

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Now, lets consider average memory access time after adding L2 cache.

Average access time = H1(L1 access time) + (1-H1)(L1 access time + average L2 access time)

35% of 2.4 = 0.98(1)  + 0.02(1 - 80H2 + 86 )

Thus, H2 = 1.14  $\approx$ 100%

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Now, lets verify if the H2 can indeed be 100%.

Average mem access time after adding L2 = 1.12    ......by considering H2=1

Average mem access time before adding L2 = 2.4

Now, $\frac{1.12}{2.4}$ = 0.46  $\approx$ 0.35

Comments

ans is 75%

---

How can you say it is hierarchical access not simultaneous? For Simultaneous access, is there any identifying sentence(like for Hierarchical it is"check a block in L1 if not found then go to memory and bring it to L1) or it would be explicitly mentioned?

For me, it seems Simultaneous access because it is said that check L1 otherwise take it from memory.

Please help me with this doubt.