Draw state diagram for a FSM that outputs sequence 010011. Clocked repeatedly it outputs 010011010011010011, etc. Using three bits, assign encodings for the states. Design the combinational circuitry needed to calculate the next state and the output. Do not draw the circuit...
So I've done the state encodings, but can't seem to figure out how to use a multiplexer to determine how to give out a 3-bit state output from a 3-bit state input... Any clues? Thanks!
