Digital Test Series

Question

A 3 bit down counter is used to control the output of the multiplexer as shown in the figure. The counter is intially at (101)₂ then output of multiplexer will follow the sequence

1) I1 0 I2 0

2) I1 I1 0 I2

Comments

s1 and s2 are select line which have 10 as value so it select line I2 so output will be 0 I2 0 0

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Plz look the inputs carefully ..@Anirudh..

Answer 1

The first sequence will be followed..Let us see how..

It is given binary down counter..So counting will be from high to low number..

It is to be noted that A₂  is connected to S₀  , A₁ is connected to S₁  and A₀ is connected to enable line of multiplexer..Also it is a active high multiplexer so will remain active when enable = 1 else will be disabled and 0 is given as output..

So initially we have the value of A₂ A₁ A₀  =  1 0 1..So value of S₁S₀  = 0 1

So output for this will be : I₁

Next the value of  A₂ A₁ A₀  =  1 0 0..So enable becomes 0 so output will become 0 

Then  next value of  A₂ A₁ A₀  =  0 1 1.So  enable becomes 1 again and hence we see S₁S₀  which is = 1 0..So I₂ is given as output..

Then he value of  A₂ A₁ A₀  =  0 1  0..So enable becomes 0 so output will become 0 ..

Hence the sequence is I₁ -- 0 -- I₂ --- 0

Comments

@Habib Active high means when enable line is 1, then will give output.rt?

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Ya exactly..Active low means output will be given when enable = 0