Carry Output= Cin.[A⊕B] + AB
These are the equations which can be realized for full adder as per the description is given by the question.
XOR gate delay=2.4 microseconds and AND/OR gate delay= 1.2 microseconds.
So this way, Sum delay of 1 Full Adder= 2.4+2.4=4.8 micro-seconds.
Carry Delay= First we have to wait for the output of A⊕B, which will be available to us after 2.4 micro seconds, and then 1 AND operation + 1 OR operation. So total= 2.4+1.2+1.2=4.8 micro seconds.
The question is asking for total propagation time of 4 bit binary adder implemented using described 4 one bit full adders.
The total propagation time means when would the last Full adder give the output of Sum.
The last Full Adder can only produce sum output only when carry input from previous Full adders are available.
So, the fourth Full Adder will wait (3*4.8 microseconds) for carry from previous 3 Full adders,
and produce the sum in next 4.8 microseconds after this.
So, total delay= 3*4.8 +4.8 = 19.2 micro seconds.