The Gateway to Computer Science Excellence
First time here? Checkout the FAQ!
x
+9 votes
894 views

In 2's complement addition, overflow

  1. is flagged whenever there is carry from sign bit addition
  2. cannot occur when a positive value is added to a negative value
  3. is flagged when the carries from sign bit and previous bit match
  4. None of the above
asked in Digital Logic by Veteran (68.9k points) | 894 views

1 Answer

+28 votes
Best answer

(B) is the answer. When a positive value and negative value are added overflow never happens. 

http://sandbox.mc.edu/~bennet/cs110/tc/orules.html

answered by Veteran (332k points)
selected by
Overflow can when 2 postive value are added and it result in a negative value and vice versa . so overflow falg is set .
means?
Sir , in case of unsigned numbers .. 2's complement addition of a positive and negative number can yield an overflow .

Here nothing is given about signed or unsgned numbers .. so what will be the answer ?

None of the above?


Quick search syntax
tags tag:apple
author user:martin
title title:apple
content content:apple
exclude -tag:apple
force match +apple
views views:100
score score:10
answers answers:2
is accepted isaccepted:true
is closed isclosed:true

32,693 questions
39,293 answers
110,104 comments
36,700 users