1 votes 1 votes A 1-bit full adder circuit takes 5 ns to generate the carry-out bit and 10 ns for the sum-bit. When 3, 1-bit full adders are cascaded, the maximum rate of additions per second will be _______ × 107. dileswar sahu asked Nov 17, 2016 dileswar sahu 1.6k views answer comment Share Follow See all 0 reply Please log in or register to add a comment.
Best answer 3 votes 3 votes T = ( n-1 ) * carry propagation delay + 1 * sum propagation delay (if sum pd > carry pd) = 2 * 5ns + 1 * 10ns = 20ns That means 20ns per addition. So additions per second = 1 / 20ns = 5 * 10^7. so ans is 5 (given 10^7). Similar one: https://gateoverflow.in/81788/ripple-carry-adder Prabhanjan_1 answered Nov 18, 2016 • selected Jan 18, 2017 by Prajwal Bhat Prabhanjan_1 comment Share Follow See 1 comment See all 1 1 comment reply Vineet Singh 1 commented Nov 18, 2018 reply Follow Share why only PD for one Full adder has been taken It should be taken for all 4 FA 0 votes 0 votes Please log in or register to add a comment.
