edited by
11,391 views

3 Answers

Best answer
39 votes
39 votes

Answer is D.

A: Yes. Total delay = Max (All delays) + Register Delay.

B: Yes, if data forwarding is not there.

C: Yes, like ID and EX shares ID/EX register.

edited by
23 votes
23 votes
Option D)All Of The Above.

Pipeline suffer from options:-

A) Yes, As pipeline need to work in SYNC all stage should operate in same time. If there are stages taking different time, if there is a slower stage, all faster stage will be bottlenecked by the cycles the slowest stage takes.

B)Yes, As there could be DATA HAZARDS.
           eg: SUB R2,R4,R5
                 ADD R6,R2,R4 //here register r2 result will be dependent on first instruction.

C)Yes, IF(Instruction Fetch) and MEM(Main Memory) stage can cause STRUCTURAL HAZARDS and there may be a chance that both stages need Memory simultaneously, that's why many Arch. slipt the cache as INST cache and Data Cache.
edited by
0 votes
0 votes
1. Pipelining is one way of improving the overall processing performance of a processor.
2. This architectural approach allows the simultaneous execution of several instructions.
3. Pipelining is transparent to the programmer; it exploits parallelism at the instruction level by overlapping the execution process of instructions.
4. It is analogous to an assembly line where workers perform a specific task and pass the partially completed product to the next worker.
Answer:

Related questions

39 votes
39 votes
8 answers
1
Kathleen asked Sep 15, 2014
17,643 views
The maximum number of edges in a $n$-node undirected graph without self loops is$n^2$$\frac{n(n-1)}{2}$$n-1$$\frac{(n+1)(n)}{2}$
32 votes
32 votes
5 answers
2
Kathleen asked Sep 15, 2014
13,671 views
In the absolute addressing mode:the operand is inside the instructionthe address of the operand in inside the instructionthe register containing the address of the operan...
16 votes
16 votes
2 answers
3
Kathleen asked Sep 15, 2014
6,078 views
Which of the following is not a form of memoryinstruction cacheinstruction registerinstruction opcodetranslation look-a-side buffer
28 votes
28 votes
6 answers
4
Kathleen asked Sep 15, 2014
9,784 views
To evaluate an expression without any embedded function callsOne stack is enoughTwo stacks are neededAs many stacks as the height of the expression tree are neededA Turin...