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7 votes

Choose the correct alternatives (More than one may be correct).

Two NAND gates having open collector outputs are tied together as shown in below figure.

The logic function $Y,$ implemented by the circuit is,

  1. $Y=ABC + DE$
  2. $Y=\overline{ABC + DE}$
  3. $Y=ABC.DE$
  4. $Y=\overline{ABC.DE}$
in Digital Logic 1.8k views

4 Answers

8 votes
Best answer

There should be bubbled connection b/w two gates 

$Y=((ABC)' + (DE)' )'$

$\implies Y=(ABC).(DE)$

NOTE: open gate works as NOR gate.

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6 votes

A Wired Connection can create both an AND gate and an OR gate , however it cannot implement a not gate .

but to know whether this intersection acts as AND gate or OR gate , we should know whether the intersection is at a HIGH or a LOW.

i think here they have assumed it to be at a HIGH , hence the answer will be Y=(ABC)' . (DE)' .

The collector outputs have been connected. Therefore, the intersection is at HIGH.
1 vote
I think it is a or operation so A and b I think because  if we assume three wires are connected in y tri  joint now if any of the wire is having the current it will come to down wire also na sooo why and operation
1 vote

Unfortunately options provided to the question are wrong...

refer this :

Right options are :


Y= (ABC)' + (DE)'


Y= (ABC)' . (DE)'

*Referring to the "wired logic" connection, mentioned in this wiki page

A wired logic connection can create an AND or an OR gate. The limitations are the inability to create a NOT gate and the lack of level restoration.

*Then what we are left to wonder is what will be the logical choice between AND and OR in this scenario...(option B or D??), At this point I will agree with shaurya vardhan, here it's assumed to be AND by default as is hinted by this image in wikipedia :

Example wired AND.svg


Hence answer is option D) Y= (ABC)' . (DE)'

If anyone comes up with a reasonable explaination, please share...

edited by

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