The DAD instruction (Double Add) allows 16-bit addition between the HL register pair and any one of the BC, DE, HL, or SP register pairs, putting the result in HL. It takes a single operand which may be B, D, H, or SP. The carry flag is set to indicate overflow is sum exceeds 16 bits. The contents of source register pair is not altered
so DAD H performs
HL=HL+HL
Hence ans is B
DAD D performs
HL=HL+DE
DAD B performs
HL=HL+BC
DAD SP
HL=HL+SP