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speed up = ntn/ (k+n-1)tp

where n--no. of inst

tn-time taken in non pipelined system

k-- no.of stages in pipeline

tp -- time of one stage(1 clock)

On substitution .. ans is 1.67

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For 10 instructions, non-pipelined architecture = $250ns$

For 10 instructions, pipelined architecture = $60+9(10)=150ns$

Speedup = $\frac{250}{150}=1.66$
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