coa morris mano numerical cache memory gate also important

Question

A digital computer has a memory unit of 64K x 16 and a cache memory of 1K words. The cache uses direct mapping with a block size of 4 words.
a. How many bits are there in the tag, index, block and word fields of the address format?
b. How many bits are there in each word of the cache, and how are they divided into functions? Include the valid bit.
c. How many blocks can the cache accommodate?

Comments

no of blocks present is cache =1024/4

                                          =512 (blocks)
block offset contain 4 worrd to address them we need 2 bits 
total memory size is 2¹⁷ so we have
tag as 6 bits 
blocks as 9 bits 
offset as 2 bits.?
correct if any mistake u found .i did not understand b) option 

Answer 1

MM size =$ 64K \times 16 = 2^{16} \times 16 $, i.e, MM has $2^{16} words$
therefore Physical address = PA = 16 bits

tag

block

offset

<------------16 bits------------>

no. of blocks in cache $= \frac{cache\_size}{block\_size} = \frac{2^{10}}{2^2} = 2^8 =256$ 
$\therefore$ 8 bits for block

 as block size = 4 words = $2^2$ words
$\therefore$ 2 bits for offset

now tag = 16 - 8 - 2 = 6 bits

a) Tag = 6 bits, Index = block = 8 bits, offset = word = 2 bits

b) Memory unit is $64k \times 16 = 2^{16} \times 16$
therefore, 16 bits for Address(MAR) and  16 bits for Data(MBR)
so, each word of cache will contain = Data + tag + valid = 16+6+1 = 23 bits in a word

c) Cache can accommodate 256 blocks

Answer 2

Assuming word size =16 bits

Main memory will have 16k words

So number of mm blocks will be 16k/4=4k blocks

Cache number of blocks will be 256 blocks

As it is direct mapped cache so 4k blocks /256 blocks = 2^6--- 6 bits for tag

Index will be as there are 256 blocks so ----8 bits for that

Block offset will be 4 words so --2 bits for that

And byte addressable so 16 bits = 2 bytes ----- so 1 bit to represent word offset