1st NAND gate = $\overline{(A\cdot B)}$

then NOT = $A\cdot B$

2nd NOT = $\overline{A}$

then NOR = $\overline{(A\cdot B)+\overline{A}} = \overline{B+\overline{A}} = A \cdot \overline{B}$

**this shows
when A = 0 output is 0
when A = 1 output is toggled i.e, **$\overline{B}$

**correct me if i m wrong??**