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An 8085-based microcomputer consisting of 16 kbytes of ROM, 16kbytes of RAM and four 8-bit I/O ports is to be designed using RAM and ROM chips each of 2 kbytes capacity. The chip to be used for I/O ports realization consists of two 8-bit ports and requires four address locations.

  1. Design a fully decoded address decoder circuit with minimum chip count. The RAM and ROM are to be mapped onto the highest and lowest order memory locations, respectively in the memory address space. The I/O locations are to occupy lower order I/O address space.
  2. Give memory map and I/O address map.
in CO and Architecture by Boss (29.8k points) | 85 views

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