cache

Question

A computer has a $256$ KB, K-way set associative write-back data cache with block size of $32$ B. The address sent to the cache controller by the processor is of $32$ bits. In addition to the address tag, each cache tag directory contains $2$ valid bits and $1$ modified bit. If $16$ bits are used to address tag. What is the minimum value of K?

a)$6$

b)$5$

c)$4$

d)None of these

Comments

ans given c)

i think it should be d )
 in their solution they are not considering the  3 extra bits  i.e 16 tag bits + 3 bits(2 valid and 1 modified) they are solving just using 16 bits

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yes, they are not considered in that, because the processor generates a virtual address for accessing the location the processor doesnot know whether it is valid / invalid or something, so they will not be included in the 32 bits generated address, later they are compared and the values are found.

Answer 1

Given CPU generated address length =  32

          Tag bits    =    16

          Block offset bits  =  log₂ 32  =  5

 So     set bits     =    32 - 16 - 5   =  11

          But no of cache blocks  =  256 K / 32   =   2¹³

         So associativity    =   2¹³ /  2¹¹

                                    =   4

Hence C) is the correct answer..Here nothing to be confused with valid bit etc as they are not generated by CPU ..They are a part of tag overhead which will be managed by cache controller..Just like a page table entry may contain valid/invalid,dirty bits but they are not part of CPU generated address similar is the case here.. 

Comments

Here we are focussing on CPU generated address..

Those bits will come into picture when the question is being asked regarding tag overhead size in which u have to associate these bits in addition to tag bits with each block of the cache..

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k or we will add these bits when they ask about TAG memory SIZE??

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Ya exactly..:)