For a pipelined CPU with a single ALU, consider the following situations
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The ${j+1}^{st}$ instruction uses the result of the $j^{th}$ instruction as an operand
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The execution of a conditional jump instruction
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The $j^{th}$ and ${j+1}^{st}$ instructions require the ALU at the same time.
Which of the above can cause a hazard
- I and II only
- II and III only
- III only
- All the three