search
Log In
0 votes
176 views

in CO and Architecture 176 views

1 Answer

0 votes
first step get the instrcution from memory to instruction register. The time will depend on the size of instruction. In one cycle 1 word will be read from memory. First instruction will take 16 cycle for getting in the Instruction register. Then for indirect addressing 4 cycle to get EA then 4 to get oprand. LIKe wise it will be 24 + 12 + 10 + 2 + 24 + 4 for all instruction respectively.

1 clock = 1/ frequency
total clock required = 76

time = 76/2 ns = 38 ns

Related questions

0 votes
2 answers
2
708 views
S1 :- if load factor of hash table is less than 1 then there are no collision S2:- As the size of hash table increases, the number of collisions will decrease. True false?
asked Dec 4, 2017 in Algorithms rahul sharma 5 708 views
1 vote
0 answers
3
...