0 votes 0 votes how many clock pulse are required for complete operation of 4 bit parallel-in-serial-out-shift-register ? Digital Logic digital-logic + – saurabh rai asked Dec 9, 2016 saurabh rai 843 views answer comment Share Follow See all 3 Comments See all 3 3 Comments reply akashsheoran commented Dec 10, 2016 reply Follow Share It is 4? 0 votes 0 votes saurabh rai commented Dec 10, 2016 reply Follow Share explain plzz ? 0 votes 0 votes akashsheoran commented Dec 11, 2016 reply Follow Share For input...you have four parallel inputs. So just feed in the bits and give one clock cycle. All values will be stored. Now to take out....you have only one ouput line. So u have to take out serially...since one bit will already be present at the output.. We need 3 more cycles to obtain all 4 bits. Google shift registers. You will get the idea. :) 0 votes 0 votes Please log in or register to add a comment.
