A ROM has the following time parameters:
- Maximum Address to valid Data Output delay $= 30$ n sec.
- Maximum Chip Select to valid Data Output delay $= 20$ n sec.
- Maximum Data Hold time (after address change or after chip deselect) $= 10$ n sec
Assume that,
- the chip is selected using one of the address lines, and,
- the data setup time is negligible
What is the maximum rate at which a CPU can continuously read data from this ROM?
(Show your calculations step-by-step)
