1 votes 1 votes CO and Architecture co-and-architecture pipelining + – monty asked Dec 30, 2016 • retagged Nov 13, 2017 by Arjun monty 723 views answer comment Share Follow See all 12 Comments See all 12 12 Comments reply Show 9 previous comments Lokesh . commented Dec 30, 2016 reply Follow Share @Anjana it is not mentioned that instruction decode cycle fetches the req. operands...i m assuming that operands are fetched in execution cycle caz Decode: During this cycle the encoded instruction present in the IR (instruction register) is interpreted by the decoder. 1 votes 1 votes Anjana Babu commented Dec 30, 2016 reply Follow Share Okay :) Usually I have seen Decode stage is fetching req operands and Execution stage simply performing ALU. That is what I have seen. But should be mentioned as well This is really bad question. :( 0 votes 0 votes Lokesh . commented Dec 30, 2016 reply Follow Share execution phase is taking 3 cycles so i thought it is performing operand fetch + ALU 0 votes 0 votes Please log in or register to add a comment.