https://computationstructures.org/lectures/caches/caches.html → The Memory Hierarchy
https://computationstructures.org/lectures/vm/vm.html → Virtual Memory
https://computationstructures.org/lectures/pbeta/pbeta.html → Pipelining
I hope you find this useful :)
1-Basic operation of computer
2-Memory addressing and languages
3-software and architecture types( watch from 14:26 seconds )
4-Instruction Set architecture
5-Representation of numbers
6-measuring of CPU performance(importantfor pipelining)
7-Inst format and addressing modes
8-Introduction to Control unit
9-Explaining control steps for instructions..
10-Some more examples
11-Implementation and types of control unit
12-How processor and memory interact
13-Memory interfacing and addressing
14-Memory hierarchy and some important definitions
15-Some numericals on Memory hierarchy
16-Mapping techniques in cache
17-Types of cache misses,cache write stratergies,
18-Improving performance of cache
19-Basic concepts of pipeling
21-Intro to data hazards
22-hazards while accessing memory and types of hazards
23-Control hazards( watch till 15:11 seconds)
24-Secondary storage devices( watch till 24:33 seconds. you can watch till the end if you want)
26-Data transfer techniques
29-Direct memory access
If you are not satisfied or couldn’t understood any topic in above videos,you can refer those in below courses.
Some other sources:
Computer Organization by Prof. S. Raman
Computer Organization by Prof.P.K. Biswas
High performance computing by prof.Matthew jacob
Answer by bikram sir
Nptel web course
carry and overflow
Do these only after you’re done with previous gate questions.
course3(Highly recommended to solve these assignments)
for some topics like arithmetic you can refer Carl hamacher ,Marris mano.
Note:The above sources are not exhaustive.
I may have missed some topics.But you can cover them through textbooks and while solving questions.
All the videos are taken from this course.Incase i have missed or misplaced any video links,you can refer the nptel course.
Completing Digital logic subject before starting this subject is highly recommended.
I will edit this blog if i find any good sources in future.
Thank you :)
Most people have trouble with Cache Misses. You can go through this:
Adding the corrected pipeline diagram for the question discussed in the video:
http://gateoverflow.in/8560/gate2015-3_51 Question regarding Minimum Average Latency from Dynamic Pipeline portion asked once in 2015.