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Machine instructions and Addressing modes. ALU, data‐path and control unit. Instruction pipelining. Memory hierarchy: cache, main memory and secondary storage; I/O interface (Interrupt and DMA mode)

$$\small{\overset{{\large{\textbf{Mark Distribution in Previous GATE}}}}{\begin{array}{|c|c|c|c|c|c|c|c|}\hline
\textbf{Year}&\textbf{2019}&\textbf{2018}&\textbf{2017-1}&\textbf{2017-2}&\textbf{2016-1}&\textbf{2016-2}&\textbf{Minimum}&\textbf{Average}&\textbf{Maximum}
\\\hline\textbf{1 Mark Count}&2&2&2&0&1&1&0&1.3&2
\\\hline\textbf{2 Marks Count}&1&3&4&3&2&5&1&3&5
\\\hline\textbf{Total Marks}&4&8&10&6&5&11&\bf{4}&\bf{7.3}&\bf{11}\\\hline
\end{array}}}$$

Recent questions in CO and Architecture

0 votes
2 answers
1
NIELIT 2016 MAR Scientist C - Section C: 19
When a subroutine is called, then address of the instruction following the CAL instruction is stored in/on the Stack pointer Accumulator Program counter Stack
When a subroutine is called, then address of the instruction following the CAL instruction is stored in/on the Stack pointer Accumulator Program counter Stack
asked Apr 2 in CO and Architecture Lakshman Patel RJIT 74 views
0 votes
1 answer
2
NIELIT 2016 MAR Scientist C - Section C: 27
The process of entering data into a storage location causes variation in its address number adds to the contents of the location is called a readout operation is destructive of previous contents
The process of entering data into a storage location causes variation in its address number adds to the contents of the location is called a readout operation is destructive of previous contents
asked Apr 2 in CO and Architecture Lakshman Patel RJIT 66 views
0 votes
1 answer
3
NIELIT 2016 MAR Scientist C - Section C: 28
Serial access memories are useful in applications where data consists of numbers short access time is required each stored word is processed differently data naturally needs to flow in and out in serial form
Serial access memories are useful in applications where data consists of numbers short access time is required each stored word is processed differently data naturally needs to flow in and out in serial form
asked Apr 2 in CO and Architecture Lakshman Patel RJIT 46 views
0 votes
1 answer
5
NIELIT 2016 MAR Scientist C - Section C: 46
Micro program is the name of source program in micro computers the set of instructions indicating the primitive operations in a system primitive form of macros used in assembly language programming program of very small size
Micro program is the name of source program in micro computers the set of instructions indicating the primitive operations in a system primitive form of macros used in assembly language programming program of very small size
asked Apr 2 in CO and Architecture Lakshman Patel RJIT 45 views
0 votes
1 answer
6
NIELIT 2016 MAR Scientist C - Section C: 47
If a processor does not have any stack pointer register, then it cannot have subroutine call instruction it can have subroutine call instruction, but no nested subroutine calls nested subroutine calls are possible, but interrupts are not all sequences of subroutine calls and also interrupts are possible
If a processor does not have any stack pointer register, then it cannot have subroutine call instruction it can have subroutine call instruction, but no nested subroutine calls nested subroutine calls are possible, but interrupts are not all sequences of subroutine calls and also interrupts are possible
asked Apr 2 in CO and Architecture Lakshman Patel RJIT 42 views
0 votes
1 answer
8
NIELIT 2017 OCT Scientific Assistant A (IT) - Section B: 5
Which of the following is not a form of main memory? Instruction cache Instruction register Instruction opcode Translation look-aside buffer [closed]
Which of the following is not a form of main memory? Instruction cache Instruction register Instruction opcode Translation look-aside buffer
asked Apr 1 in CO and Architecture Lakshman Patel RJIT 142 views
0 votes
2 answers
10
NIELIT 2017 OCT Scientific Assistant A (IT) - Section B: 18
A pipeline is having speed up factor as $10$ and operating with efficiency of $80\%.$ What will be the number of stages in the pipeline? $10$ $8$ $13$ None
A pipeline is having speed up factor as $10$ and operating with efficiency of $80\%.$ What will be the number of stages in the pipeline? $10$ $8$ $13$ None
asked Apr 1 in CO and Architecture Lakshman Patel RJIT 153 views
0 votes
1 answer
11
NIELIT 2017 OCT Scientific Assistant A (IT) - Section B: 22
In time division switches if each memory access takes $100\;ns $ and one frame period is $125\;\mu s,$ then the maximum number of lines that can be supported is $625$ lines $1250$ lines $2300$ lines $318$ lines
In time division switches if each memory access takes $100\;ns $ and one frame period is $125\;\mu s,$ then the maximum number of lines that can be supported is $625$ lines $1250$ lines $2300$ lines $318$ lines
asked Apr 1 in CO and Architecture Lakshman Patel RJIT 128 views
0 votes
1 answer
12
NIELIT 2017 OCT Scientific Assistant A (IT) - Section B: 26
Which level of RAID refers to disk mirroring with block striping? RAID level $1$ RAID level $2$ RAID level $0$ RAID level $3$ [closed]
Which level of RAID refers to disk mirroring with block striping? RAID level $1$ RAID level $2$ RAID level $0$ RAID level $3$
asked Apr 1 in CO and Architecture Lakshman Patel RJIT 78 views
0 votes
1 answer
13
NIELIT 2017 OCT Scientific Assistant A (IT) - Section B: 35
In a $10$-bit computer instruction format, the size of address field is $3$-bits. The computer uses expanding OP code technique and has $4$ two-address instructions and $16$ one-address instructions. The number of zero address instructions it can support is $256$ $356$ $640$ $756$
In a $10$-bit computer instruction format, the size of address field is $3$-bits. The computer uses expanding OP code technique and has $4$ two-address instructions and $16$ one-address instructions. The number of zero address instructions it can support is $256$ $356$ $640$ $756$
asked Apr 1 in CO and Architecture Lakshman Patel RJIT 151 views
1 vote
2 answers
19
NIELIT 2017 DEC Scientific Assistant A - Section B: 23
A $3.5$ inch micro floppy high density disk contains the data _________ . $720 \: MB$ $1.44 \: MB$ $720 \: KB$ $1.44 \: KB$
A $3.5$ inch micro floppy high density disk contains the data _________ . $720 \: MB$ $1.44 \: MB$ $720 \: KB$ $1.44 \: KB$
asked Mar 31 in CO and Architecture Lakshman Patel RJIT 147 views
1 vote
4 answers
20
NIELIT 2016 MAR Scientist B - Section C: 9
A certain processor supports only the immediate and the direct addressing modes. Which of the following programming language features cannot be implemented on this processor? Pointers. Arrays. Records. All of these.
A certain processor supports only the immediate and the direct addressing modes. Which of the following programming language features cannot be implemented on this processor? Pointers. Arrays. Records. All of these.
asked Mar 31 in CO and Architecture Lakshman Patel RJIT 366 views
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