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Machine instructions and Addressing modes. ALU, data‐path and control unit. Instruction pipelining. Pipeline hazards, Memory hierarchy: cache, main memory and secondary storage; I/O interface (Interrupt and DMA mode)

$$\scriptsize{\overset{{\large{\textbf{Mark Distribution in Previous GATE}}}}{\begin{array}{|c|c|c|c|c|c|c|c|}\hline
\textbf{Year}& \textbf{2022} & \textbf{2021-1}&\textbf{2021-2}&\textbf{2020}&\textbf{2019}&\textbf{2018}&\textbf{2017-1}&\textbf{2017-2}&\textbf{2016-1}&\textbf{2016-2}&\textbf{Minimum}&\textbf{Average}&\textbf{Maximum}
\\\hline\textbf{1 Mark Count} & 3 &1&2&3&2&2&2&0&1&1&0&1.7&3
\\\hline\textbf{2 Marks Count} & 2 &2&2&4&1&3&4&3&2&5&1&2.8&5
\\\hline\textbf{Total Marks} & 7 &5&6&11&4&8&10&6&5&11&\bf{4}&\bf{7.3}&\bf{11}\\\hline
\end{array}}}$$

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3 votes
2 answers
3342
test series
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3343
16 KB, 4-way set-associative cache, 32-bit address, byte addressable memory, 32-byte cache blocks/lines
16 KB, 4-way set-associative cache, 32-bit address, byte addressable memory, 32-byte cache blocks/linesHow many tag bits?Where would you find the word at address 0x200356...
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1 votes
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3344
MadeEasy Workbook: CO & Architecture - Interrupts
Q i have doubt that if interrupt occurs on that instruction then value pushed in to stack after exeuting current instruction ...i think
Q i have doubt that if interrupt occurs on that instruction then value pushed in to stack after exeuting current instruction ...i think
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3345
pipelining
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2 votes
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3348
UGC NET CSE | June 2012 | Part 2 | Question: 46
A complete micro computer system consists of Microprocessor Memory Peripheral equipment All of the above
A complete micro computer system consists ofMicroprocessorMemoryPeripheral equipmentAll of the above
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3351
Finding the data rate of a channel
Consider a channel with source and target having distance between them of 10km. Propagation delay is 10 microsec/km. What will be the data rate of the channel if the RTT is equal to the transmission delay and packet size is 125 bytes? a) 5MBps b)5Mbps c)10KBps d)15kbps
Consider a channel with source and target having distance between them of 10km. Propagation delay is 10 microsec/km. What will be the data rate of the channel if the RTT ...
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2 votes
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3354
Magnetic tape.
How to find the total capacity of the magnetic tape and all the properties related to magnetic tape?
How to find the total capacity of the magnetic tape and all the properties related to magnetic tape?
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2 votes
1 answer
3355
Size of Comparator?
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1 votes
1 answer
3356
Choose the correct option?
Consider a computer system that has a cache with 512 blocks each of which can store 32 bytes.All addresses are byte addresses.Which Cache set will the memory address 0xFBFC map to if the cache is direct mapped (a)1DC (b)1CF (c)DF1 (d)DAC
Consider a computer system that has a cache with 512 blocks each of which can store 32 bytes.All addresses are byte addresses.Which Cache set will the memory address 0xFB...
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3357
Calculate effective memory address
A two word instruction.is stored at location W. Address field of the instruction ( stored at W+1) holds value Y. If program counter value is PC, What is the effective address of this instruction?
A two word instruction.is stored at location W. Address field of the instruction ( stored at W+1) holds value Y. If program counter value is PC, What is the effective add...
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3359
floating point number
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