Boolean algebra. Combinational and sequential circuits. Minimization. Number representations and computer arithmetic (fixed and floating point)

$$\scriptsize{\overset{{\large{\textbf{Mark Distribution in Previous GATE}}}}{\begin{array}{|c|c|c|c|c|c|c|c|}\hline
\textbf{Year}& \textbf{2022} & \textbf{2021-1}&\textbf{2021-2}&\textbf{2020}&\textbf{2019}&\textbf{2018}&\textbf{2017-1}&\textbf{2017-2}&\textbf{2016-1}&\textbf{2016-2}&\textbf{Minimum}&\textbf{Average}&\textbf{Maximum}
\\\hline\textbf{1 Mark Count} & 1&2&3&2&4&2&3&2&3&3&1&2.5&4
\\\hline\textbf{2 Marks Count} & 2&2&2&1&2&2&0&4&2&0&0&1.7&4
\\\hline\textbf{Total Marks} & 5&6&7&4&8&6&3&10&7&3&\bf{3}&\bf{5.9}&\bf{10}\\\hline
\end{array}}}$$

Recent questions in Digital Logic

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Digital Logic
What is the maximum n-bit number in base x ,when represented in decimal(10)?

What is the maximum n-bit number in base x ,when represented in decimal(10)?

deba1014

75 views

deba1014 asked Apr 12

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0 answers

Convert the following decimal numbers to 8-bit two’s complement numbers or indicate that the number would overflow the range.

lolok

71 views

lolok asked Apr 4

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Exam
Design a 3-bit code to represent each of the six digits of the base-6 number system. Make the binary code self-complementing so that the 5's complement is obtained by changing 1's to 0's and Os to 1's in all bits of the coded numbers.

Design a 3-bit code to represent each of the six digits of the base-6 number system. Make the binary code self-complementing so that the 5's complement is obtained by cha...

Bubby

74 views

Bubby asked Mar 27

0 votes

1 answer

GATE CSE 2024 | Set 2 | Question: 4
The format of a single-precision floating-point number as per the $\text{IEEE 754}$ standard is: Sign Exponent Mantissa $(1 \mathrm{bit})$ $(8 \mathrm{bits})$ $(23 \mathrm{bits})$ Choose the largest floating- ... $0$ $11111111$ $11111111111111111111111$ Sign Exponent Mantissa $0$ $01111111$ $00000000000000000000000$

The format of a single-precision floating-point number as per the $\text{IEEE 754}$ standard is:Sign ExponentMantissa$(1 \mathrm{bit})$ $(8 \mathrm{bits})$ $(23 \ma...

Arjun

2.6k views

Arjun asked Feb 16

1 votes

2 answers

GATE CSE 2024 | Set 2 | Question: 20
For a Boolean variable $x$, which of the following statements is/are FALSE? $x .1=x$ $x+1=x$ $x \cdot x=0$ $x+\bar{x}=1$

For a Boolean variable $x$, which of the following statements is/are FALSE?$x .1=x$$x+1=x$$x \cdot x=0$$x+\bar{x}=1$

Arjun

2.1k views

Arjun asked Feb 16

1 votes

1 answer

GATE CSE 2024 | Set 2 | Question: 39
Which of the following is/are EQUAL to $224$ in radix - $5$ (i.e., base - $5$) notation? $64$ in radix -10 $100$ in radix -8 $50$ in radix -16 $121$ in radix -7

Which of the following is/are EQUAL to $224$ in radix - $5$ (i.e., base - $5$) notation?$64$ in radix -10$100$ in radix -8$50$ in radix -16$121$ in radix -7

Arjun

1.8k views

Arjun asked Feb 16

3 votes

1 answer

GATE CSE 2024 | Set 2 | Question: 40
Consider $4$-variable functions $f 1, f 2, f 3, f 4$ expressed in sum-of-minterms form as given below. $ \begin{array}{l} f 1=\sum(0,2,3,5,7,8,11,13) \\ f 2=\sum(1,3,5,7,11,13,15) \\ f 3=\sum(0,1,4,11) \\ f 4=\sum(0,2,6,13) \end{array} $ With ... $\boldsymbol{Y}=\sum(0,1,2,3,4,5,6,7)$ $\boldsymbol{Y}=\Pi(8,9,10,11,12,13,14,15)$

Consider $4$-variable functions $f 1, f 2, f 3, f 4$ expressed in sum-of-minterms form as given below.$$\begin{array}{l}f 1=\sum(0,2,3,5,7,8,11,13) \\f 2=\sum(1,3,5,7,11,...

Arjun

1.9k views

Arjun asked Feb 16

3 votes

5 answers

GATE CSE 2024 | Set 1 | Question: 3
Consider a system that uses $5$ bits for representing signed integers in $2$ 's complement format. In this system, two integers $A$ and $B$ are represented as $A$=$01010$ and $B$=$11010$. Which one of the following operations will result in either an arithmetic overflow or an arithmetic underflow? $A+B$ $A-B$ $B-A$ $2 * B$

Consider a system that uses $5$ bits for representing signed integers in $2$ 's complement format. In this system, two integers $A$ and $B$ are represented as $A$=$01010$...

Arjun

3.9k views

Arjun asked Feb 16

2 votes

1 answer

GATE CSE 2024 | Set 1 | Question: 18
Consider the circuit shown below where the gates may have propagation delays. Assume that all signal transitions occur instantaneously and that wires have no delays. Which of the following statements about the circuit is/are CORRECT? With no propagation ... , the output $Y$ can have a transient logic Zero after $X$ transitions from logic One to logic Zero

Consider the circuit shown below where the gates may have propagation delays. Assume that all signal transitions occur instantaneously and that wires have no delays...

Arjun

2.4k views

Arjun asked Feb 16

0 votes

2 answers

GATE CSE 2024 | Set 1 | Question: 37
Consider a Boolean expression given by $\text{F(X, Y, Z)}=\sum(3,5,6,7)$. Which of the following statements is/are CORRECT? $\text{F(X, Y, Z)}=\Pi(0,1,2,4)$ $\text{F(X, Y, Z)=X Y+Y Z+X Z}$ $\text{F(X, Y, Z)}$ is independent of input $\text{Y}$ $\text{F(X, Y, Z)}$ is independent of input $\text{X}$

Consider a Boolean expression given by $\text{F(X, Y, Z)}=\sum(3,5,6,7)$.Which of the following statements is/are CORRECT?$\text{F(X, Y, Z)}=\Pi(0,1,2,4)$ $\text{F(X, Y, ...

Arjun

2.0k views

Arjun asked Feb 16

1 votes

3 answers

GATE CSE 2024 | Set 1 | Question: 54
Consider a digital logic circuit consisting of three $2$-to-$1$ multiplexers $\text{M1, M2}$, and $\text{M3}$ as shown below. $\mathrm{X} 1$ and $\mathrm{X} 2$ are inputs of $\mathrm{M} 1$. $\text{X3}$ and $\text{X4}$ are inputs ... the number of combinations of $\mathrm{A}, \mathrm{B}, \mathrm{C}$ that give the output $\mathbf{Y}=\mathbf{1}$ is ____________.

Consider a digital logic circuit consisting of three $2$-to-$1$ multiplexers $\text{M1, M2}$, and $\text{M3}$ as shown below. $\mathrm{X} 1$ and $\mathrm{X} 2$ are inputs...

Arjun

2.1k views

Arjun asked Feb 16

0 votes

1 answer

self doubts
how to simplify this boolean function i tend to get confuse on this given problem F(a,b,c)=(AB+AC)'+A'B'C

how to simplify this boolean function i tend to get confuse on this given problem F(a,b,c)=(AB+AC)'+A'B'C

223 views

el asked Feb 6

2 votes

1 answer

GO Classes Test Series 2024 | Mock GATE | Test 14 | Question: 28
Consider function $\mathbf{G}(\mathbf{A}, \mathbf{B}, \mathbf{C})=\mathbf{A B}+\mathbf{B C}$. Let $\mathbf{F}(\mathbf{A}, \mathbf{B}, \mathbf{C})$ ... input to a 2-to-1 multiplexer. The correct implementation of $\mathbf{F}(\mathbf{A}, \mathbf{B}, \mathbf{C})$ is shown in:

Consider function $\mathbf{G}(\mathbf{A}, \mathbf{B}, \mathbf{C})=\mathbf{A B}+\mathbf{B C}$. Let $\mathbf{F}(\mathbf{A}, \mathbf{B}, \mathbf{C})$ be the dual of $\mathbf...

GO Classes

524 views

GO Classes asked Feb 5

4 votes

1 answer

GO Classes Test Series 2024 | Mock GATE | Test 14 | Question: 29
The largest positive number in 2's complement format represented with 8-bits is: $(\mathrm{FF})_{16}$ $(128)_{10}$ $(777)_8$ $(01111111)_2$

The largest positive number in 2's complement format represented with 8-bits is:$(\mathrm{FF})_{16}$$(128)_{10}$$(777)_8$$(01111111)_2$

GO Classes

503 views

GO Classes asked Feb 5

5 votes

1 answer

GO Classes Test Series 2024 | Mock GATE | Test 14 | Question: 30
Consider the function $f\left(x_1, x_2, x_3\right)=x_1 \cdot x_2 \cdot x_3+\bar{x}_1 \cdot \bar{x}_2 \cdot \bar{x}_3+\bar{x}_1 \cdot x_2 \cdot \bar{x}_3+\bar{x}_1 \cdot x_2 \cdot x_3$, what is the product of sum(POS) expression ...

Consider the function $f\left(x_1, x_2, x_3\right)=x_1 \cdot x_2 \cdot x_3+\bar{x}_1 \cdot \bar{x}_2 \cdot \bar{x}_3+\bar{x}_1 \cdot x_2 \cdot \bar{x}_3+\bar{x}_1 \cdot x...

GO Classes

486 views

GO Classes asked Feb 5

2 votes

1 answer

GO Classes Test Series 2024 | Mock GATE | Test 14 | Question: 59
Consider the shift register circuit shown in below figure. Assume that $\mathbf{I}_3 \mathbf{I}_2 \mathbf{I}_1 \mathbf{I}_0=0101$ has been loaded in the 4-bit register using the parallel load mechanism (i.e., shift=0 ... consecutive positive edges of the clock signal we need to keep shift=1 such that zero detect is activated to a 1?

Consider the shift register circuit shown in below figure. Assume that $\mathbf{I}_3 \mathbf{I}_2 \mathbf{I}_1 \mathbf{I}_0=0101$ has been loaded in the 4-bit register us...

GO Classes

530 views

GO Classes asked Feb 5

3 votes

0 answers

GO Classes Test Series 2024 | Mock GATE | Test 14 | Question: 60
The logic circuit above is used to compare two unsigned 2-bit numbers, $X_1 X_0=X$ and $Y_1 Y_0=Y$, where $X_0$ and $Y_0$ are the least significant bits. (A small circle on any line in a logic diagram indicates logical NOT.) Which of the following always makes the output $Z$ have the value 1? $X\gt Y$ $X\lt Y$ $X=Y$ $X \neq Y$

The logic circuit above is used to compare two unsigned 2-bit numbers, $X_1 X_0=X$ and $Y_1 Y_0=Y$, where $X_0$ and $Y_0$ are the least significant bits. (A small circle ...

GO Classes

341 views

GO Classes asked Feb 5

5 votes

2 answers

GO Classes Test Series 2024 | Mock GATE | Test 14 | Question: 61
According to the IEEE standard, a 32-bit, single-precision, floating-point number $N$ is defined to be $ N=(-1)^S \times 1 . F \times 2^{E-127} $ where $S$ is the sign bit, $F$ the fractional mantissa, and $E$ the biased exponent. A floating- ... $\left(1-2^{-23}\right) * 2^{128}$ $\left(1+\left(1-2^{-23}\right)\right) * 2^{128}$

According to the IEEE standard, a 32-bit, single-precision, floating-point number $N$ is defined to be$$N=(-1)^S \times 1 . F \times 2^{E-127}$$where $S$ is the sign bit,...

GO Classes

618 views

GO Classes asked Feb 5

3 votes

1 answer

GO Classes Test Series 2024 | Mock GATE | Test 13 | Question: 25
A garage door opens if it ever sees the password $011$ in a transmission. More formally, this FSM takes a bitstring consisting of $\text{0's}$ and $\text{1's}$ as its input, and continually outputs $\text{0's}$ until it sees the substring $011,$ ... Arrow $1 - (0/0)$ Arrow $3 - (1/0)$ Arrow $4 - (1/0)$ Arrow $5 - (1/1)$

A garage door opens if it ever sees the password $011$ in a transmission. More formally, this FSM takes a bitstring consisting of $\text{0's}$ and $\text{1's}$ as its inp...

GO Classes

374 views

GO Classes asked Jan 28

4 votes

1 answer

GO Classes Test Series 2024 | Mock GATE | Test 13 | Question: 26
The figure below represents the Karnaugh map for a function $\text{F(A,B,C,D).}$ Note, $\text{ X'}$ stands for don't care. The simplified logical expression in the sum-of-products (SOP) form (i.e., the minimum number of ... can be converted into a circuit implementation using only NAND gates, which is shown in: a b c d

The figure below represents the Karnaugh map for a function $\text{F(A,B,C,D).}$ Note, $\text{‘X’}$ stands for don’t care.The simplified logical expression in the s...

GO Classes

351 views

GO Classes asked Jan 28

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