Search results for digital-circuits / GATE Overflow for GATE CSE

54 votes

5 answers

1

GATE CSE 2003 | Question: 44
A $\text{1-input}$, $\text{2-output}$ synchronous sequential circuit behaves as follows: Let $z_k, n_k$ denote the number of $0's$ and $1's$ respectively in initial $k$ bits of the input $(z_k+n_k=k)$. The circuit outputs $00$ until one of the ... is $01$. What is the minimum number of states required in the state transition graph of the above circuit? $5$ $6$ $7$ $8$

A $\text{1-input}$, $\text{2-output}$ synchronous sequential circuit behaves as follows:Let $z_k, n_k$ denote the number of $0’s$ and $1’s$ respectively in initial $k...

Kathleen

11.9k views

Kathleen asked Sep 17, 2014

32 votes

7 answers

2

GATE CSE 2019 | Question: 30
Consider three $4$-variable functions $f_1, f_2$, and $f_3$, which are expressed in sum-of-minterms as $f_1=\Sigma(0,2,5,8,14),$ $f_2=\Sigma(2,3,6,8,14,15),$ $f_3=\Sigma (2,7,11,14)$ For the following circuit with one AND gate and one XOR gate the output function $f$ can be ... as: $\Sigma(7,8,11)$ $\Sigma (2,7,8,11,14)$ $\Sigma (2,14)$ $\Sigma (0,2,3,5,6,7,8,11,14,15)$

Consider three $4$-variable functions $f_1, f_2$, and $f_3$, which are expressed in sum-of-minterms as$f_1=\Sigma(0,2,5,8,14),$$f_2=\Sigma(2,3,6,8,14,15),$$f_3=\Sigma (2,...

Arjun

14.4k views

Arjun asked Feb 7, 2019

3 votes

2 answers

3

GO Classes Test Series 2024 | Mock GATE | Test 13 | Question: 27
What statement is correct for $f(A, B)$ in the following circuit? $f(A, B)=\overline{\overline{A \cdot B} \cdot(A+B)}$ when Control $=1$ $f(A, B)=A \cdot B$ when Control $=0$ $f(A, B)=\overline{A}+\overline{B}$ when Control $=1$ $f(A, B)=\overline{A} \cdot \overline{B}$ when Control $=0$

What statement is correct for $f(A, B)$ in the following circuit?$f(A, B)=\overline{\overline{A \cdot B} \cdot(A+B)}$ when Control $=1$$f(A, B)=A \cdot B$ when Control $=...

GO Classes

373 views

GO Classes asked Jan 28

3 votes

0 answers

4

GO Classes Test Series 2024 | Mock GATE | Test 14 | Question: 60
The logic circuit above is used to compare two unsigned 2-bit numbers, $X_1 X_0=X$ and $Y_1 Y_0=Y$, where $X_0$ and $Y_0$ are the least significant bits. (A small circle on any line in a logic diagram indicates logical NOT.) Which of the following always makes the output $Z$ have the value 1? $X\gt Y$ $X\lt Y$ $X=Y$ $X \neq Y$

The logic circuit above is used to compare two unsigned 2-bit numbers, $X_1 X_0=X$ and $Y_1 Y_0=Y$, where $X_0$ and $Y_0$ are the least significant bits. (A small circle ...

GO Classes

338 views

GO Classes asked Feb 5

3 votes

1 answer

5

GO Classes Test Series 2024 | Mock GATE | Test 11 | Question: 16
Which one of the following options is CORRECT for the given logic circuit? $P=1, Q=1 ; X=0$ $P=1, Q=0 ; X=1$ $P=0, Q=1 ; X=0$ $P=0, Q=0 ; X=1$

Which one of the following options is CORRECT for the given logic circuit?$P=1, Q=1 ; X=0$$P=1, Q=0 ; X=1$$P=0, Q=1 ; X=0$$P=0, Q=0 ; X=1$

GO Classes

388 views

GO Classes asked Jan 13

0 votes

1 answer

6

ISRO 2024
Which of the following definitions is true A digital multiplexer takes one input from many inputs and outputs the selected one Four elect lines are required for 1-16 multiplexer Eight OR gates are required to implement an octal to binary encoder (i) and (ii) (ii) and (iii) (i) alone none of the above

Which of the following definitions is trueA digital multiplexer takes one input from many inputs and outputs the selected oneFour elect lines are required for 1-16 multip...

Ramayya

230 views

Ramayya asked Jan 7

0 votes

1 answer

7

ISRO 2024
A full adder circuit requires two inputs and two outputs two inputs and three outputs three inputs and two outputs three inputs and one output A request to the approver.!! This question is asked in ISRO 2024. Due to insufficient points, couldn’t add ‘isro2024’ tag, Please add it.

A full adder circuit requirestwo inputs and two outputstwo inputs and three outputsthree inputs and two outputsthree inputs and one outputA request to the approver.!!This...

Ramayya

134 views

Ramayya asked Jan 7

0 votes

1 answer

8

ISRO 2024
The time delay obtained through an 8-bit serial register with 400 MHz clock is: 20 ns 2.5 µs 20 µs 2.5 µs

The time delay obtained through an 8-bit serial register with 400 MHz clock is:20 ns2.5 µs20 µs2.5 µs

Ramayya

272 views

Ramayya asked Jan 7

0 votes

0 answers

9

TEST SERIES
Anyone ?

Anyone ?

Rahhul A

169 views

Rahhul A asked Jan 2

0 votes

1 answer

10

Counting number of "AND" and "OR" gates in a multiplexer and decoder. How do we approach such questions?

tishhaagrawal

287 views

tishhaagrawal asked Dec 4, 2023

0 votes

1 answer

11

Digital Logic Made Easy OTS

Sajal Mallick

271 views

Sajal Mallick asked Nov 18, 2023

0 votes

0 answers

12

Madeeasy ots Digital Logic Combinational Circuits
I am confused in active low enable input and active low output?

I am confused in active low enable input and active low output?

Sajal Mallick

209 views

Sajal Mallick asked Nov 23, 2023

0 votes

0 answers

13

madeeasy ots digital logic
In the 2nd cycle as it is ripple counter Q0 will change and it will 0 so for that reason Q1 will not get clock and it will be in previous state that is 1. So output should be 01. Right??

In the 2nd cycle as it is ripple counter Q0 will change and it will 0 so for that reason Q1 will not get clock and it will be in previous state that is 1. So output shoul...

Sajal Mallick

212 views

Sajal Mallick asked Nov 19, 2023

4 votes

1 answer

14

3 input EX-NOR Gate and Its Associativity - Digital Logic
Does EX-NOR Gate follow Associativity ? How 3 input EX-NOR function is equal to 3 input EX-OR function ?

Does EX-NOR Gate follow Associativity ?How 3 input EX-NOR function is equal to 3 input EX-OR function ?

AniMan_7

1.1k views

AniMan_7 asked Jun 29, 2023

0 votes

1 answer

15

logic gates

yahba

163 views

yahba asked Oct 2, 2023

2 votes

3 answers

16

GO Classes Test Series 2023 | Digital Logic | Test 2 | Question: 21
A combinational logic circuit takes a $4$-bit unsigned binary integer number at its inputs labeled $\mathrm{D}_{3}, \mathrm{D}_{2}, \mathrm{D}_{1}$ and $\mathrm{D}_{0}$, where $\mathrm{D}_{3}$ is the most ... $0$ otherwise. How many prime implicants does $S$ have which are not essential prime implicants?

A combinational logic circuit takes a $4$-bit unsigned binary integer number at its inputs labeled $\mathrm{D}_{3}, \mathrm{D}_{2}, \mathrm{D}_{1}$ and $\mathrm{D}_{0}$, ...

GO Classes

225 views

GO Classes asked May 27, 2022

2 votes

2 answers

17

GO Classes Test Series 2023 | Digital Logic | Test 2 | Question: 13
The $8$ to $3$ Encoder or Octal to Binary encoder consists of $8$ inputs : $O_{7}$ to $\mathrm{O}_{0}$ and $3$ outputs $: B_{2}, B_{1}$ and $\mathrm{B}_{0}$. Each input line corresponds to each octal digit and three outputs ... $B_{1}$ and $B_{2}$ are Correct $B_{0}$ and $B_{1}$ are Correct All of them are Correct

The $8$ to $3$ Encoder or Octal to Binary encoder consists of $8$ inputs : $O_{7}$ to $\mathrm{O}_{0}$ and $3$ outputs $: B_{2}, B_{1}$ and $\mathrm{B}_{0}$. Each input l...

GO Classes

286 views

GO Classes asked May 27, 2022

0 votes

0 answers

18

Digital Logic Design
What is the correct answer of this Question ?

What is the correct answer of this Question ?

Sandeep652025

462 views

Sandeep652025 asked Sep 20, 2023

0 votes

0 answers

19

GATE CS/IT - (2005) Digital Logic. (Made Easy PYQ Book - 2019 book)
Which is the following expression is equivalent to $(A \oplus B) \oplus C$ ? $(A + B + C) (\bar{A} + \bar{B} + \bar{C})$ $(A + B + C) (\bar{A} + \bar{B} + C)$ $ABC + \bar{A} (B\oplus C) + \bar{B} (A \oplus C)$ None of these.

Which is the following expression is equivalent to $(A \oplus B) \oplus C$ ?$(A + B + C) (\bar{A} + \bar{B} + \bar{C})$ $(A + B + C) (\bar{A} + \bar{B} + C)$$ABC + \bar{A...

SumitBM

362 views

SumitBM asked Aug 21, 2023

2 votes

1 answer

20

GO Classes 2023 | IIITH Mock Test 1 | Question: 36
The $8$ to $3$ Encoder or Octal to Binary encoder consists of $8$ inputs : $O_{7}$ to $\mathrm{O}_{0}$ and $3$ outputs $: B_{2}, B_{1}$ and $\mathrm{B}_{0}$. Each input line corresponds to each octal digit and three outputs generate ... $B_{2}$ is Correct $B_{1}$ and $B_{2}$ are Correct $B_{0}$ and $B_{1}$ are Correct All of them are Correct

The $8$ to $3$ Encoder or Octal to Binary encoder consists of $8$ inputs : $O_{7}$ to $\mathrm{O}_{0}$ and $3$ outputs $: B_{2}, B_{1}$ and $\mathrm{B}_{0}$. Each input l...

GO Classes

710 views

GO Classes asked Mar 26, 2023

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