Search results for paging / GATE Overflow for GATE CSE

11 votes

2 answers

1

GATE CSE 2023 | Question: 48
Consider a computer system with $57$-bit virtual addressing using multi-level tree-structured page tables with $\mathrm{L}$ levels for virtual to physical address translation. The page size is $4 \mathrm{~KB}(1 \mathrm{~KB}=1024 \mathrm{~B})$ and a page table entry at any of the levels occupies $8$ bytes. The value of $\mathrm{L}$ is ______________.

Consider a computer system with $57$-bit virtual addressing using multi-level tree-structured page tables with $\mathrm{L}$ levels for virtual to physical address transla...

admin

12.0k views

admin asked Feb 15, 2023

6 votes

2 answers

2

GO Classes Test Series 2024 | Mock GATE | Test 13 | Question: 45
Imagine a computer with a $32$-bit virtual address space and $\text{1 KB}$ pages. It uses a two-level page table system, with page-sized chunks at the inner level(not at the outer level). Suppose the code is located at address $0,$ and there are ... is $4$ Bytes.) $64 \mathrm{~KB}$ $2 \mathrm{~KB}$ $66 \mathrm{~KB}$ $16 \mathrm{MB}$

Imagine a computer with a $32$-bit virtual address space and $\text{1 KB}$ pages. It uses a two-level page table system, with page-sized chunks at the inner level(not at ...

GO Classes

824 views

GO Classes asked Jan 28

9 votes

2 answers

3

GO Classes Test Series 2024 | Mock GATE | Test 14 | Question: 36
Assume a linear page table, with a 1-byte page-table entry. Assume physical and virtual address spaces of size 128 bytes with 32-byte pages. The page-table base register is set to physical address 16. The contents of ... What are the physical addresses that will get referred in fetch and execute of the above instruction? 10 42 102 70

Assume a linear page table, with a 1-byte page-table entry. Assume physical and virtual address spaces of size 128 bytes with 32-byte pages. The page-table base register ...

GO Classes

622 views

GO Classes asked Feb 5

9 votes

1 answer

4

GO Classes Test Series 2024 | Mock GATE | Test 11 | Question: 20
Suppose that pages are $512 \mathrm{~B}$ and each page table entry is $4$ bytes. Assume that somehow the virtual and physical address spaces were both $4$ ... PTE we would look at? $\textsf{0x10000000}$ $\textsf{0x10000001}$ $\textsf{0x10000004}$ $\textsf{0x10000345}$

Suppose that pages are $512 \mathrm{~B}$ and each page table entry is $4$ bytes. Assume that somehow the virtual and physical address spaces were both $4$ GB and that the...

GO Classes

656 views

GO Classes asked Jan 13

4 votes

1 answer

5

GO Classes Test Series 2024 | Mock GATE | Test 12 | Question: 9
Consider a system with $4 \mathrm{~GB}$ of physical memory and $64 \mathrm{~GB}$ of Virtual Memory. The page size is $4 \mathrm{~KB}$. Recall that the page table is stored in physical memory and consists of PTEs (page ... each page could store $2048$ PTEs. How many pages does our page table occupy if we have a single-level page table?

Consider a system with $4 \mathrm{~GB}$ of physical memory and $64 \mathrm{~GB}$ of Virtual Memory. The page size is $4 \mathrm{~KB}$. Recall that the page table is store...

GO Classes

657 views

GO Classes asked Jan 21

0 votes

1 answer

6

Paging
If Page size = Frame size is always true and offset in Logical address = offset in physical address holds Then how/why Logical address size can come different than physical address size?

If Page size = Frame size is always true and offset in Logical address = offset in physical address holdsThen how/why Logical address size can come different than physica...

Mrityudoot

160 views

Mrityudoot asked Mar 20

5 votes

1 answer

7

GO Classes Test Series 2024 | Mock GATE | Test 13 | Question: 21
Consider a virtual memory system that uses paging. Virtual and physical addresses are both $32$ bits long, and the page size is $4 \textsf{KB}=2^{12}$ bytes. A process $\text{P}_1$ has the following page table. ... $\textsf{0x00003b65}$ $\textsf{0x00875b65}$ $\textsf{0x00875}$ Translation is not possible as per the given page table

Consider a virtual memory system that uses paging. Virtual and physical addresses are both $32$ bits long, and the page size is $4 \textsf{KB}=2^{12}$ bytes. A process $\...

GO Classes

420 views

GO Classes asked Jan 28

0 votes

0 answers

8

memory management
we have 8 pages (each side 32B) to store in physical memory of 2^32 bits how many bits are required to identify each page , according to me 3 bits are required but that is wrong plz explain why

we have 8 pages (each side 32B) to store in physical memory of 2^32 bits how many bits are required to identify each page , according to me 3 bits are required but that i...

SSR17

211 views

SSR17 asked Feb 8

11 votes

3 answers

9

GATE CSE 2022 | Question: 54
Consider a demand paging system with four page frames (initially empty) and $\text{LRU}$ page replacement policy. For the following page reference string $7, 2, 7, 3, 2, 5, 3, 4, 6, 7, 7, 1, 5, 6, 1$ the page fault rate, defined as the ratio of number of page faults to the number of memory accesses $\textit{(rounded off to one decimal place)}$ is _____________.

Consider a demand paging system with four page frames (initially empty) and $\text{LRU}$ page replacement policy. For the following page reference string$$7, 2, 7, 3, 2, ...

Arjun

8.1k views

Arjun asked Feb 15, 2022

0 votes

1 answer

10

#Applied Course
Consider a demand-paging system with a paging disk that has an average access and transfer time of 20 milliseconds. Addresses are translated through a page table in main memory, with an access time of 1 microsecond per memory access. Thus, each memory reference ... of the total) cause page faults. The effective memory access time is _____ micro-seconds (Round off to 1 decimal place)

Consider a demand-paging system with a paging disk that has an average access and transfer time of 20 milliseconds. Addresses are translated through a page table in main ...

Dknights

230 views

Dknights asked Dec 18, 2023

1 votes

0 answers

11

Memory Management
Assume in a computer supporting paging, virtual addresses are 36 bits long. Page size is 16 KB, no matter which paging structure is used. Assume a page table entry is 8 bytes long, no matter which paging structure is used. The computer has 4 GB of RAM (physical ... a) One level page table. b) Two level page table with address division scheme (11, 11, 14). c) Inverted page table.

Assume in a computer supporting paging, virtual addresses are 36 bits long. Page size is 16 KB, no matter which paging structure is used. Assume a page table entry is 8 b...

swap02

375 views

swap02 asked Dec 16, 2023

0 votes

0 answers

12

Made Easy Question : Multilevel Paging system, please refer the question below.
In this question, they have asked for memory requirements for page tables across the levels, solving which I am getting number of level 3 page tables as 2^8. Below is a brief of my approach, can anybody please explain if I am right or ... 3 PTs + level 4 PTs = 1 + 1 + 2^8 + 2^16 Where am I doing wrong? Please explain.

In this question, they have asked for memory requirements for page tables across the levels, solving which I am getting number of level 3 page tables as 2^8. Below is a b...

tishhaagrawal

247 views

tishhaagrawal asked Dec 5, 2023

0 votes

1 answer

13

Paging , performance of paging w.r.t to space
Consider a System using Paging technique with an Address Space of65,536 Bytes. The Page Size in this System is 4096 Bytes. The Program Consists of Text, Data and Stack Sections as per the specifications given below: Text: 32,768 Bytes Data ... Address Space? b)What is the Maximum Page Size in Bytes such that the Program Fits in the Given Address Space?

Consider a System using Paging technique with an Address Space of65,536 Bytes. The Page Size in this System is 4096 Bytes. The Program Consists of Text, Data and Stack Se...

sumantsingh_

315 views

sumantsingh_ asked Jun 4, 2023

34 votes

3 answers

14

GATE CSE 1997 | Question: 3.10, ISRO2008-57, ISRO2015-64
Dirty bit for a page in a page table helps avoid unnecessary writes on a paging device helps maintain LRU information allows only read on a page None of the above

Dirty bit for a page in a page tablehelps avoid unnecessary writes on a paging devicehelps maintain LRU informationallows only read on a pageNone of the above

Kathleen

11.1k views

Kathleen asked Sep 29, 2014

0 votes

2 answers

15

Ace Test Series | Operating System | Demand paging
On a system using demand paging, it takes 200 ns to satisfy a memory request if the page is in memory. If the page is not in memory, the request takes 7 ms if a free frame is available or the page to be replaces is not ... of the time the page to be replaced has been modified? 600.19 micro seconds 590.19 micro seconds 790.19 micro seconds none

On a system using demand paging, it takes 200 ns to satisfy a memory request if the page is in memory. If the page is not in memory, the request takes 7 ms if a free fram...

none30

439 views

none30 asked Jul 1, 2023

0 votes

1 answer

16

OPERATING SYSTEM
Assuming 3-level of paging is used by a paging system and a TLB for address translation. Calculate Average memory access time if each main memory access takes 100ns and TLB access time is 10ns, page fault service time is given as 200ns and TLB hit ratio is 80% and page fault rate is 10%.

Assuming 3-level of paging is used by a paging system and a TLB for address translation. Calculate Average memory access time if each main memory access takes 100ns and T...

24aaaa23

449 views

24aaaa23 asked Oct 2, 2023

0 votes

2 answers

17

Memory Management And Paging
Can Any explain the relationship between The “ Word Size “ and “ Logical Address Space “

Can Any explain the relationship between The “ Word Size “ and “ Logical Address Space “

Unique_999

324 views

Unique_999 asked Aug 17, 2023

0 votes

1 answer

18

Can anyone explain , in the concept of segmentation . let the base address of a particular segment is 1900 and the limit of the segment is 400(i.e., size limit). Exactly what does it represent at the address 1900. Is it a page or group of pages or words

Unique_999

304 views

Unique_999 asked Sep 3, 2023

0 votes

1 answer

19

Ace Test Series | Operating System | Paging
A machine supports a 48 bit virtual address and 32 bit physical address. Pages are 8KB. If the page table entry contains besides other information, one V/I bit, 1R, 1M and 2 bits for page protection. What is the page table size in bytes? 86 MB 128 MB 96 MB 512 MB

A machine supports a 48 bit virtual address and 32 bit physical address. Pages are 8KB. If the page table entry contains besides other information, one V/I bit, 1R, 1M an...

none30

301 views

none30 asked Sep 4, 2023

2 votes

4 answers

20

NIELIT 2017 DEC Scientific Assistant A - Section B: 9
Operating System maintains the page table for : each process each thread each instruction each address

Operating System maintains the page table for :each processeach threadeach instructioneach address

admin

17.4k views

admin asked Mar 31, 2020

tags	tag:apple
author	user:martin
title	title:apple
content	content:apple
exclude	-tag:apple
force match	+apple
views	views:100
score	score:10
answers	answers:2
is accepted	isaccepted:true
is closed	isclosed:true