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Recent questions tagged #digitallogic
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1
TEST BOOK QUESTION
CAN SOMEBODY EXPLAIN THIS ANSWER PLZ !!!
asked
May 14, 2019
in
Digital Logic
by
Shawn Frost
(
31
points)

71
views
#digitallogic
0
votes
1
answer
2
NTA NET DEC 2018
asked
Mar 12, 2019
in
Digital Logic
by
Kuljeet Shan
Active
(
2.1k
points)

66
views
#booleanalgebra
#digitallogic
0
votes
0
answers
3
#KMAP #Digital
https://courses.cs.washington.edu/courses/cse370/99au/sections/qs3/sld014.htm At this link,xor gates are detected using offset and diagonal adjacency method. I found this method in R.P. Jain book as well. But it is bit confusing. I am not able to get it. Please cite some examples and explain.
asked
Jan 27, 2019
in
Digital Logic
by
Reshu $ingh
(
265
points)

32
views
#digitallogic
0
votes
0
answers
4
#DIGITAL DOUBT
1.IN MUX IF SELECTION LINE S$_{1}$,S$_{0}$ AND AN OTHER MUX SELECTION LINE S$_{0}$ ,S$_{1}$ FOR SAME INPUT OUTPUT CHANGE OR NOT
asked
Jan 14, 2019
in
Digital Logic
by
amit166
Junior
(
775
points)

15
views
#digitallogic
0
votes
0
answers
5
#digital
Let f(x$_{1}$,x$_{2}$,x$_{3}$,………,x$_{10}$)=1 if 5 or more variable equal to one ,then number of prime implicants are in f?
asked
Jan 11, 2019
in
Digital Logic
by
amit166
Junior
(
775
points)

33
views
#digitallogic
0
votes
0
answers
6
#digital
Let f(x$_{1}$,x$_{2}$,x$_{3}$,………,x$_{10}$)=1 if 5 or more variable equal to one ,then number of prime implicants are in f?
asked
Jan 11, 2019
in
Digital Logic
by
amit166
Junior
(
775
points)

16
views
#digitallogic
0
votes
0
answers
7
#digital
Let f(x$_{1}$,x$_{2}$,x$_{3}$,………,x$_{10}$)=1 if 5 or more variable equal to one ,then number of prime implicts are in f?
asked
Jan 11, 2019
in
Digital Logic
by
amit166
Junior
(
775
points)

16
views
#digitallogic
0
votes
1
answer
8
#kmap
what is cyclic prime implicant ?
asked
Oct 19, 2018
in
Digital Logic
by
Satbir
Boss
(
24.1k
points)

64
views
#digitallogic
0
votes
0
answers
9
#digital logic
please explain Post’s Functional Completeness Theorem ??
asked
Sep 14, 2018
in
Digital Logic
by
saurabh111
(
305
points)

17
views
#digitallogic
+1
vote
1
answer
10
#self doubt
A full adder can be implemented with half adder and OR gate. A 4bit full adder without any initially carry require? a) 8 half adder 4 OR gate b) 7 half adder 4 OR gate c) 8 half adder 3 OR gate d) 7 half adder 3 OR gate
asked
Sep 3, 2018
in
Digital Logic
by
Shubham Aggarwal
Active
(
1.8k
points)

29
views
#digitallogic
0
votes
1
answer
11
#Digital logic Floatinf point representation
The following is a scheme for floating point number representation using 16 bits. Bit Position 15 14 .... 9 8 ...... 0 s e m Sign Exponent Mantissa Then the floating point number represented is: (−1)s(1+m ... What is the minimum difference between two successive real numbers representable in this system? Any help to solve this question is appreciated.
asked
Jul 20, 2018
in
Digital Logic
by
iarnav
Loyal
(
8.4k
points)

120
views
floatingpointrepresentation
#digitallogic
digitallogic
coandarchitecture
0
votes
0
answers
12
#digital logic self doubt
Is there any formula to directly calculate the number of GRAY CODES possible? say like for 1 bit number of gray code possible = ... say like for 2 bits number of gray code possible = .... say like for 3 bist number of gray code possible = ....
asked
Jul 15, 2018
in
Digital Logic
by
iarnav
Loyal
(
8.4k
points)

37
views
#digitallogic
graycode
0
votes
2
answers
13
#digital logic GATE 2008 IT self doubt
Please refer to this GATE 2008IT QUESTION https://gateoverflow.in/3275/gate2008it15 My doubt is which of the following is used to decide the value of carry bit 1, Carry bit=1, only if carry is generated from a3+b3 to bit position 4 ( ... ) 2. Carry bit=1, only if carry is generated anywhere while adding two bits. 3. Carry bit=1, only if Carryout =1
asked
Jul 14, 2018
in
Digital Logic
by
iarnav
Loyal
(
8.4k
points)

61
views
#digitallogic
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