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Recent questions tagged 8085-microprocessor
5
votes
5
answers
31
ISRO-2013-35
How many number of times the instruction sequence below will loop before coming out of the loop? MOV AL, 00H A1: INC AL JNZ A1 1 255 256 Will not come out of the loop.
How many number of times the instruction sequence below will loop before coming out of the loop? MOV AL, 00H A1: INC AL JNZ A11255256Will not come out of t...
makhdoom ghaya
3.9k
views
makhdoom ghaya
asked
Apr 27, 2016
CO and Architecture
isro2013
8085-microprocessor
non-gate
+
–
0
votes
1
answer
32
GATE CSE 1996 | Question: 6
An 8052 based system has an output port with address 00H. Consider the following assembly language program. ORG 0100H MVI A, 00H LXI H, 0105H OUT 00H INR A PCHL HLT What does the program do with respect to the output port $00H$ ? Show the waveforms at the three least significant bits of the port $00H$.
An 8052 based system has an output port with address 00H. Consider the following assembly language program.ORG 0100H MVI A, 00H LXI H, 0105H OUT 00H INR A PCHL HLTWhat do...
Kathleen
812
views
Kathleen
asked
Oct 9, 2014
CO and Architecture
gate1996
co-and-architecture
8085-microprocessor
out-of-syllabus-now
+
–
3
votes
2
answers
33
GATE CSE 1996 | Question: 1.22
Number of machine cycles required for RET instruction in 8085 microprocessor is 1 2 3 5
Number of machine cycles required for RET instruction in 8085 microprocessor is1235
Kathleen
3.5k
views
Kathleen
asked
Oct 9, 2014
CO and Architecture
gate1996
co-and-architecture
8085-microprocessor
out-of-syllabus-now
+
–
0
votes
0
answers
34
GATE CSE 1995 | Question: 16
Kathleen
592
views
Kathleen
asked
Oct 8, 2014
CO and Architecture
gate1995
co-and-architecture
8085-microprocessor
out-of-syllabus-now
+
–
0
votes
1
answer
35
GATE CSE 1995 | Question: 2.1
A sequence of two instructions that multiplies the contents of the DE register pair by 2 and stores the result in the HL register pair (in 8085 assembly language) is: XCHG and DAD B XTHL and DAD H PCHL and DAD D XCHG and DAD H
A sequence of two instructions that multiplies the contents of the DE register pair by 2 and stores the result in the HL register pair (in 8085 assembly language) is:XCHG...
Kathleen
3.8k
views
Kathleen
asked
Oct 8, 2014
CO and Architecture
gate1995
co-and-architecture
8085-microprocessor
out-of-gate-syllabus
+
–
1
votes
1
answer
36
GATE CSE 1995 | Question: 1.1
A single instruction to clear the lower four bits of the accumulator in 8085 assembly language? XRI 0FH ANI F0H XRI F0H ANI 0FH
A single instruction to clear the lower four bits of the accumulator in 8085 assembly language?XRI 0FHANI F0HXRI F0HANI 0FH
Kathleen
2.7k
views
Kathleen
asked
Oct 8, 2014
CO and Architecture
gate1995
co-and-architecture
8085-microprocessor
out-of-gate-syllabus
+
–
0
votes
0
answers
37
GATE CSE 1994 | Question: 10
Kathleen
483
views
Kathleen
asked
Oct 5, 2014
CO and Architecture
gate1994
co-and-architecture
8085-microprocessor
out-of-syllabus-now
+
–
0
votes
0
answers
38
GATE CSE 1994 | Question: 3.1
Kathleen
682
views
Kathleen
asked
Oct 4, 2014
CO and Architecture
gate1994
co-and-architecture
8085-microprocessor
out-of-syllabus-now
+
–
0
votes
0
answers
39
GATE CSE 1993 | Question: 20
Kathleen
575
views
Kathleen
asked
Sep 29, 2014
CO and Architecture
gate1993
co-and-architecture
8085-microprocessor
out-of-gate-syllabus
+
–
0
votes
0
answers
40
GATE CSE 1997 | Question: 7
Kathleen
666
views
Kathleen
asked
Sep 29, 2014
Digital Logic
gate1997
digital-logic
8085-microprocessor
out-of-syllabus-now
+
–
3
votes
1
answer
41
GATE CSE 1997 | Question: 5.2
Contents of A register after the execution of the following 8085 microprocessor program is MVIA, 55 H MVI C, 25 H ADDC DAA 7AH 80H 50H 22H
Contents of A register after the execution of the following 8085 microprocessor program is MVIA, 55 H MVI C, 25 H ADDC DAA 7AH80H50H22H
Kathleen
6.2k
views
Kathleen
asked
Sep 29, 2014
CO and Architecture
gate1997
co-and-architecture
8085-microprocessor
non-gate
+
–
1
votes
1
answer
42
GATE CSE 1997 | Question: 2.2
RST 7.5 interrupt in 8085 microprocessor executes the interrupt service routing from interrupt vector location 0000H 0075H 003CH 0034H
RST 7.5 interrupt in 8085 microprocessor executes the interrupt service routing from interrupt vector location0000H0075H003CH0034H
Kathleen
3.0k
views
Kathleen
asked
Sep 29, 2014
CO and Architecture
gate1997
co-and-architecture
8085-microprocessor
out-of-syllabus-now
+
–
0
votes
0
answers
43
GATE CSE 1998 | Question: 15
Kathleen
489
views
Kathleen
asked
Sep 26, 2014
CO and Architecture
gate1998
co-and-architecture
8085-microprocessor
descriptive
out-of-syllabus-now
+
–
31
votes
2
answers
44
GATE CSE 1998 | Question: 1.17
The octal representation of an integer is $(342)_8$. If this were to be treated as an eight-bit integer in an $8085$ based computer, its decimal equivalent is $226$ $-98$ $76$ $-30$
The octal representation of an integer is $(342)_8$. If this were to be treated as an eight-bit integer in an $8085$ based computer, its decimal equivalent is$226$$-98$$7...
Kathleen
8.2k
views
Kathleen
asked
Sep 25, 2014
Digital Logic
gate1998
digital-logic
number-representation
normal
8085-microprocessor
+
–
0
votes
0
answers
45
GATE CSE 1999 | Question: 18
Design a 2K $\times$ 8 (2048 locations, each 8 bit wide) memory system mapped at addresses (1000)$_{16}$ to (17FF)$_{16}$ for the 8085 processor using four 1K $\times$ ... address lines. $A_0$ is the lest significant) $D_0, D_1, D_2, D_3$ (bi-directional data lines. $D_0$ is the least significant)
Design a 2K $\times$ 8 (2048 locations, each 8 bit wide) memory system mapped at addresses (1000)$_{16}$ to (17FF)$_{16}$ for the 8085 processor using four 1K $\times$ 4 ...
Kathleen
736
views
Kathleen
asked
Sep 23, 2014
CO and Architecture
gate1999
co-and-architecture
8085-microprocessor
out-of-syllabus-now
+
–
4
votes
0
answers
46
GATE CSE 2002 | Question: 2.4
What are the states of the Auxillary Carry (AC) and Carry Flag (CY) after executing the following 8085 program? MVI H, 5DH MIV L, 6BH MOV A, H ADD L AC = 0 and CY = 0 AC = 1 and CY = 1 AC = 1 and CY = 0 AC = 0 and CY = 1
What are the states of the Auxillary Carry (AC) and Carry Flag (CY) after executing the following 8085 program?MVIH,5DHMIVL,6BHMOVA,HADDL AC = 0 and CY = 0AC = 1 and CY =...
Kathleen
2.0k
views
Kathleen
asked
Sep 15, 2014
CO and Architecture
gatecse-2002
co-and-architecture
8085-microprocessor
out-of-syllabus-now
+
–
2
votes
1
answer
47
GATE CSE 2002 | Question: 1.10
In 8085 which of the following modifies the program counter Only PCHL instruction Only ADD instructions Only JMP and CALL instructions All instructions
In 8085 which of the following modifies the program counterOnly PCHL instructionOnly ADD instructionsOnly JMP and CALL instructionsAll instructions
Kathleen
1.5k
views
Kathleen
asked
Sep 15, 2014
CO and Architecture
gatecse-2002
co-and-architecture
8085-microprocessor
out-of-syllabus-now
+
–
1
votes
1
answer
48
GATE CSE 2001 | Question: 1.9
A low memory can be connected to 8085 by using $INTER$ $\overline{RESET\text{ }IN}$ $HOLD$ $READY$
A low memory can be connected to 8085 by using$INTER$$\overline{RESET\text{ }IN}$$HOLD$$READY$
Kathleen
2.4k
views
Kathleen
asked
Sep 14, 2014
CO and Architecture
gatecse-2001
co-and-architecture
8085-microprocessor
normal
out-of-syllabus-now
+
–
6
votes
0
answers
49
GATE CSE 2000 | Question: 11
Consider the following 8085 program segment, where registers B and C contain BCD values: S1: MVI A, 99H MVI D, 00H SUB C ADD B DAA S2: JC S3 MOV E, A MVI A, 99H SUB E MOV E, A JZ S4 MVI D, FFH JMP S4 S3:INC A DAA MOV E, A S4: ..... ... in register D and E when control reaches S4. What, in general, is the value of D and E as a function of B and C when control reaches S4?
Consider the following 8085 program segment, where registers B and C contain BCD values:S1: MVI A, 99H MVI D, 00H SUB C ADD B DAAS2: JC S3 MOV E, A MVI A, 99H SUB E M...
Kathleen
1.3k
views
Kathleen
asked
Sep 14, 2014
CO and Architecture
gatecse-2000
co-and-architecture
8085-microprocessor
out-of-syllabus-now
descriptive
+
–
0
votes
0
answers
50
GATE CSE 2000 | Question: 10
Consider the 8085 instruction IN 09H stored as follows: Memory Address Machine Code 3050 3051 DA 09 and the following incomplete timing diagram for the instruction: Write the contents of the boxes, A, B, C and D in hexadecimal in your answer sheet. Do ... the data on the bus? Answer by completing the following statement in your answer book: By combining signals.........
Consider the 8085 instruction IN 09H stored as follows: Memory Address Machine Code 3050 3051 DA 0...
Kathleen
854
views
Kathleen
asked
Sep 14, 2014
CO and Architecture
gatecse-2000
co-and-architecture
8085-microprocessor
out-of-syllabus-now
descriptive
+
–
1
votes
2
answers
51
GATE CSE 2000 | Question: 1.9
The 8085 microprocessor responds to the presence of an interrupt as soon as the TRAP pin becomes 'high' by checking the TRAP pin for 'high' status at the end of each instruction by checking the TRAP pin for 'high' ... the end of the execution of each instruction. by checking the TRAP pin for 'high' status at regular intervals.
The 8085 microprocessor responds to the presence of an interruptas soon as the TRAP pin becomes 'high'by checking the TRAP pin for 'high' status at the end of each instru...
Kathleen
2.0k
views
Kathleen
asked
Sep 14, 2014
CO and Architecture
gatecse-2000
co-and-architecture
8085-microprocessor
normal
out-of-syllabus-now
+
–
1
votes
1
answer
52
GATE CSE 2000 | Question: 1.7
To put the 8085 microprocessor in the wait state lower the HOLD input lower the READY input raise the HOLD input raise the READY input
To put the 8085 microprocessor in the wait statelower the HOLD inputlower the READY inputraise the HOLD inputraise the READY input
Kathleen
2.7k
views
Kathleen
asked
Sep 14, 2014
CO and Architecture
gatecse-2000
co-and-architecture
8085-microprocessor
easy
out-of-syllabus-now
+
–
2
votes
0
answers
53
GATE CSE 1992 | Question: 06,a,b
A microprocessor is capable of addressing 1 megabyte of memory with a 20-bit address bus. The system to be designed requires 256 K bytes of RAM, 256 K bytes of EPROM, 16 I/O devices (memory mapped I/O) and 1 K byte of ... to two clock cycles for memory read and write. Assuming control signals similar to 8085, design the extra logic required for interfacing EERAM.
A microprocessor is capable of addressing 1 megabyte of memory with a 20-bit address bus. The system to be designed requires 256 K bytes of RAM, 256 K bytes of EPROM, 16 ...
Kathleen
1.1k
views
Kathleen
asked
Sep 13, 2014
Digital Logic
gate1992
digital-logic
descriptive
memory-interfacing
out-of-gate-syllabus
8085-microprocessor
+
–
3
votes
0
answers
54
GATE CSE 1992 | Question: 02,iv
02. Choose the correct alternatives (more than one may be correct) and write the corresponding letters only:
02. Choose the correct alternatives (more than one may be correct) and write the corresponding letters only:
Kathleen
672
views
Kathleen
asked
Sep 12, 2014
CO and Architecture
gate1992
co-and-architecture
8085-microprocessor
out-of-syllabus-now
+
–
3
votes
1
answer
55
GATE CSE 1991 | Question: 03,v
Choose the correct alternatives (more than one may be correct) and write the corresponding letters only: The $ALE$ line of an $8085$ microprocessor is used to: (a). Latch the output of an $I/O$ instruction into an external latch. (b). Deactivate the ... $TRAP$ interrupt. (e). None of the above
Choose the correct alternatives (more than one may be correct) and write the corresponding letters only:The $ALE$ line of an $8085$ microprocessor is used to:(a). Latch ...
Kathleen
1.4k
views
Kathleen
asked
Sep 12, 2014
CO and Architecture
gate1991
co-and-architecture
normal
8085-microprocessor
out-of-gate-syllabus
+
–
1
votes
2
answers
56
GATE CSE 1991 | Question: 03,iv
The TRAP interrupts mechanism of the $8085$ microprocessor: executes an $RST$ by hardware executes an instruction supplied by an external device through the $INTA$ signal executes an instruction from memory location $20H$ executes a NOP none of the above
The TRAP interrupts mechanism of the $8085$ microprocessor:executes an $RST$ by hardwareexecutes an instruction supplied by an external device through the $INTA$ signalex...
Kathleen
2.5k
views
Kathleen
asked
Sep 12, 2014
CO and Architecture
gate1991
co-and-architecture
8085-microprocessor
normal
out-of-gate-syllabus
+
–
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