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Recent questions tagged adder

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33
Full adder
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36
Doubt
How to check whether there is overflow in n-bit parallel adder?
How to check whether there is overflow in n-bit parallel adder?
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38
Adder
One ripple carry adder is adding two n-bit integers. The time complexity to perform addition using this adder is (We know carry look ahead adder takes time log n. Is it similar for other adders too). Plz also share some good resource about these two adders
One ripple carry adder is adding two n-bit integers. The time complexity to perform addition using this adder is (We know carry look ahead adder takes time log n. Is it s...
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39
Digital Logic
Please elaborate your answer.
Please elaborate your answer.
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1 votes
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40
CLA and RCA delays.
How to analyse the delays of Ripple carry adder and Carry look ahead adder. Please explain with Example.
How to analyse the delays of Ripple carry adder and Carry look ahead adder.Please explain with Example.
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41
Half adders
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42
MadeEasy Test Series: Digital Logic - Adder
A 1-bit full adder circuit takes 5 ns to generate the carry-out bit and 10 ns for the sum-bit. When 4, 1-bit full adders are cascaded, the maximum rate of additions per second will be _______ × 107.
A 1-bit full adder circuit takes 5 ns to generate the carry-out bit and 10 ns for the sum-bit. When 4, 1-bit full adders are cascaded, the maximum rate of additions per s...
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44
Modified GATE 2003 question
Consider this GATE 2003 question: https://gateoverflow.in/937/gate2003-46 Here, instead of XOR gates we had OR gates, then which of the following operations can we perform? $A + B, A - B\ and\ A + 1$
Consider this GATE 2003 question: https://gateoverflow.in/937/gate2003-46Here, instead of XOR gates we had OR gates, then which of the following operations can we perform...
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47
made easy book
If the carry propogation delay is 5 in full adder then multiplication of 8 bit number using co-multiplier takes(Assume AND gate delay=2)
If the carry propogation delay is 5 in full adder then multiplication of 8 bit number using co-multiplier takes(Assume AND gate delay=2)
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48
Which expression is right with respect to carry look header?
(i) Ci +1= Gi+ PiCi (ii) Ci +1= G(i+1) + P(i+1)Ci https://www.youtube.com/watch?v=9lyqSVKbyz8&index=116&list=PLBlnK6fEyqRjMH3mWf6kwqiTbT798eAOm i or ii ?
(i) Ci +1= Gi+ PiCi(ii) Ci +1= G(i+1) + P(i+1)Cihttps://www.youtube.com/watch?v=9lyqSVKbyz8&index=116&list=PLBlnK6fEyqRjMH3mWf6kwqiTbT798eAOmi or ii ?
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49
adder
This is binary to radix -12 circuit, how?
This is binary to radix -12 circuit, how?
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4 answers
50
ISRO2017-24
When two $n$-bit binary numbers are added the sum will contain at the most $n$ bits $n + 2$ bits $n + 3$ bits $n + 1$ bits
When two $n$-bit binary numbers are added the sum will contain at the most$n$ bits$n + 2$ bits$n + 3$ bits$n + 1$ bits
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51
ISRO 2007-ECE Half Adder Circuit
A half adder can be constructed using two $2$-input logic gates. One of them is an $\text{AND}$-gate, the other is $\text{OR}$ $\text{NAND}$ $\text{NOR}$ $\text{EX-OR}$
A half adder can be constructed using two $2$-input logic gates. One of them is an $\text{AND}$-gate, the other is$\text{OR}$$\text{NAND}$$\text{NOR}$$\text{EX-OR}$
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52
ISRO2016-ECE Digital Logic
How many inputs & outputs does a full adder have? $3, 2$ $2, 3$ $3, 3$ $2, 2$
How many inputs & outputs does a full adder have?$3, 2$$2, 3$$3, 3$$2, 2$
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1 answer
54
Adder
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2 answers
55
GATE CSE 1988 | Question: 4ii
Using binary full adders and other logic gates (if necessary), design an adder for adding $4$-bit number (including sign) in $2’s$ complement notation.
Using binary full adders and other logic gates (if necessary), design an adder for adding $4$-bit number (including sign) in $2’s$ complement notation.
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56
full adder
Can anyone explain me this theory with an example(from the third line)...??
Can anyone explain me this theory with an example(from the third line)...??
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58
Test by Bikram | Digital Logic | Test 2 | Question: 13
Which of the following combinations is sufficient to build a half adder? EX-OR gate and NOR gate. EX-OR gate and OR gate. EX-OR gate and AND gate. Four NAND gates.
Which of the following combinations is sufficient to build a half adder?EX-OR gate and NOR gate.EX-OR gate and OR gate.EX-OR gate and AND gate.Four NAND gates.
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34 votes
1 answer
59
GATE CSE 1990 | Question: 1-i
Fill in the blanks: In the two bit full-adder/subtractor unit shown in below figure, when the switch is in position $2$ ___________ using _________ arithmetic.
Fill in the blanks:In the two bit full-adder/subtractor unit shown in below figure, when the switch is in position $2$ ___________ using _________ arithmetic.
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60
GATE CSE 1987 | Question: 3a
Design an $8 \times 8$ multiplier using five $4$-bits adders and $4$ ROM's each programmed to realise $4 \times 4$ multiplier.
Design an $8 \times 8$ multiplier using five $4$-bits adders and $4$ ROM's each programmed to realise $4 \times 4$ multiplier.
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