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Recent questions tagged adder

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3
Digital Logic | Sample question
The number of full and half-adders required to add $32$-bit numbers is______________________
The number of full and half-adders required to add $32$-bit numbers is______________________
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1 votes
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5
DRDO CSE 2022 Paper 1 | Question: 24
Given a truth table of the full adder for three inputs. Draw a full adder circuit with a decoder and two $\text{OR}$ ...
Given a truth table of the full adder for three inputs. Draw a full adder circuit with a decoder and two $\text{OR}$ gates.$$\begin{array}{|c|c|c|c|c|}\hline \mathrm{X} &...
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2 votes
1 answer
8
GATE Overflow Test Series | Mixed Subjects | Test 2 | Question: 23
If the minimum number of two-input NAND gates required to design a $1$-bit full adder is denoted by $M$ and the minimum number of two-input NOR gates required for the same is denoted by $N$, then $M+N = $ _______
If the minimum number of two-input NAND gates required to design a $1$-bit full adder is denoted by $M$ and the minimum number of two-input NOR gates required for the sam...
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3 votes
3 answers
9
NIELIT 2016 MAR Scientist B - Section C: 2
In which of the following adder circuits, the carry look ripple delay is eliminated? Half adder Full adder Parallel adder Carry-look ahead adder
In which of the following adder circuits, the carry look ripple delay is eliminated?Half adderFull adderParallel adderCarry-look ahead adder
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3 votes
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10
NIELIT 2016 DEC Scientist B (IT) - Section B: 33
How many inputs are required in Full Adder Circuit? $2$ $3$ More than two inputs None of the above
How many inputs are required in Full Adder Circuit?$2$$3$More than two inputsNone of the above
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11
UGC NET CSE | December 2005 | Part 2 | Question: 7
A half-adder is also known as : $\text{AND}$ Circuit $\text{NAND}$ Circuit $\text{NOR}$ Circuit $\text{EX-OR}$ Circuit
A half-adder is also known as :$\text{AND}$ Circuit$\text{NAND}$ Circuit$\text{NOR}$ Circuit$\text{EX-OR}$ Circuit
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6 votes
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12
ISRO2020-9
In a $8$-bit ripple carry adder using identical full adders, each full adder takes $34$ ns for computing sum. If the time taken for $8$-bit addition is $90$ ns, find time taken by each full adder to find carry. $6$ ns $7$ ns $10$ ns $8$ ns
In a $8$-bit ripple carry adder using identical full adders, each full adder takes $34$ ns for computing sum. If the time taken for $8$-bit addition is $90$ ns, find time...
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14
Morris Mano Edition 3 Exercise 5 Question 11 (Page No. 198)
Construct a 4-digit BCD adder-subtractor using 4 BCD adders. Use the Block diagram for each component, showing only inputs and outputs.
Construct a 4-digit BCD adder-subtractor using 4 BCD adders. Use the Block diagram for each component, showing only inputs and outputs.
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16
Morris Mano Edition 3 Exercise 5 Question 8 (Page No. 198)
Derive the two-level Boolean expression for the output carry $C _5$ shown in the look-ahead carry generator of the figure
Derive the two-level Boolean expression for the output carry $C _5$ shown in the look-ahead carry generator of the figure
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25
Full adder
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