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Recent questions tagged addressing-modes
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Relative Addressing Mode
Consider 3-word long jump instruction designed with PC-relative addressing mode, stored in the memory with a starting address of (2000)$_{10}$. Address field of an instruction contains (4000)$_{10}.$ Which of the following statements are true in the instruction ... where operand is stored, then how we can we assign it to PC? PC should be 2003 at the end of execution right?
Chaitanya Kale
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in
CO and Architecture
Feb 13
by
Chaitanya Kale
99
views
addressing-modes
co-and-architecture
made-easy-test-series
0
votes
1
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consider 16tb disk that uses 4kb block and free list method. how many block address can be stored in a block
Shubham Kathiriya
asked
in
Operating System
Jan 26
by
Shubham Kathiriya
140
views
operating-system
addressing-modes
0
votes
1
answer
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Addressing Modes
When we write MOV #1000 , it means we are writing the value 1000 into the accumulator. But when we write MOV 1000 here 1000 refers to address of what ? register or MM ? (knowing that MOV works only between registers).
Aaryan_Sharma
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in
CO and Architecture
Dec 30, 2022
by
Aaryan_Sharma
123
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co-and-architecture
addressing-modes
goclasses
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votes
0
answers
4
Best Open Video Playlist for Addressing Modes Topic | CO & A
Please list out the best free available video playlist for Addressing Modes from CO & A as an answer here (only one playlist per answer). We'll then select the best playlist and add to GO classroom video lists. You can ... ) but standard ones are more likely to be selected as best. For the full list of selected videos please see here
makhdoom ghaya
asked
in
Study Resources
Aug 16, 2022
by
makhdoom ghaya
104
views
go-classroom
video-links
missing-videos
free-videos
addressing-modes
0
votes
1
answer
5
#addressing modes
How to implement indirect addressing mode using register indirect addressing mode???
Subbu.
asked
in
CO and Architecture
Aug 3, 2022
by
Subbu.
135
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co-and-architecture
addressing-modes
2
votes
1
answer
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Addressing modes
Could you please explain How we can implement indirect addressing mode using Index addressing mode.. and vice versa..??
Subbu.
asked
in
CO and Architecture
Jul 14, 2022
by
Subbu.
248
views
co-and-architecture
addressing-modes
0
votes
1
answer
7
Applied Test Series
Consider a processor that includes a base with indexing addressing mode. Suppose an instruction is encountered that employs this addressing mode and specifies a displacement of 1970, in decimal. Currently the base and index register contain the decimal numbers 48,022 and 8, respectively. What is the address of the operand?
Sagar475
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in
CO and Architecture
Jan 7, 2022
by
Sagar475
610
views
co-and-architecture
addressing-modes
1
vote
2
answers
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NIELIT STA 2021
The addressing mode / s, which uses the PC instead of a general-purpose register is: Indexed with offset Relative Direct Both Indexed with offset and direct
rsansiya111
asked
in
CO and Architecture
Dec 6, 2021
by
rsansiya111
209
views
co-and-architecture
addressing-modes
2
votes
0
answers
9
Applied Test Series
An instruction is stored at location 300 with its address field at location 301. The address field has the value 400. A processor register R1 contains the number 200. Evaluate effective address if the addressing mode of the instruction is Index with R1 as the index register.
LRU
asked
in
CO and Architecture
Oct 24, 2021
by
LRU
538
views
test-series
computer
co-and-architecture
addressing-modes
1
vote
1
answer
10
NIELIT Scientific Assistant A 2020 November: 117
In the following addressing mode, which of them performs better for accessing, array? Register addressing mode Direct addressing mode Displacement addressing mode Index addressing mode
gatecse
asked
in
CO and Architecture
Dec 9, 2020
by
gatecse
168
views
nielit-sta-2020
co-and-architecture
addressing-modes
3
votes
5
answers
11
NIELIT 2016 MAR Scientist B - Section C: 9
A certain processor supports only the immediate and the direct addressing modes. Which of the following programming language features cannot be implemented on this processor? Pointers. Arrays. Records. All of these.
Lakshman Patel RJIT
asked
in
CO and Architecture
Mar 31, 2020
by
Lakshman Patel RJIT
1.2k
views
nielit2016mar-scientistb
co-and-architecture
addressing-modes
0
votes
3
answers
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NIELIT 2016 DEC Scientist B (IT) - Section B: 55
The example of implied addressing is Stack addressing Indirect addressing Immediate addressing None of the above
Lakshman Patel RJIT
asked
in
CO and Architecture
Mar 31, 2020
by
Lakshman Patel RJIT
1.9k
views
nielit2016dec-scientistb-it
co-and-architecture
addressing-modes
0
votes
2
answers
13
NIELIT 2016 DEC Scientist B (CS) - Section B: 53
The addressing mode used in an instruction of the form $ADD\:X\:Y$, is Direct Absolute Indirect Indexed
Lakshman Patel RJIT
asked
in
CO and Architecture
Mar 31, 2020
by
Lakshman Patel RJIT
1.8k
views
nielit2016dec-scientistb-cs
co-and-architecture
addressing-modes
0
votes
3
answers
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NIELIT 2017 DEC Scientist B - Section B: 40
Which of the following is/are not features of RISC processor? Large number of addressing modes. Uniform instruction set. (i) Only (ii) Only Both (i) and (ii) None of the options
Lakshman Patel RJIT
asked
in
CO and Architecture
Mar 30, 2020
by
Lakshman Patel RJIT
3.8k
views
nielit2017dec-scientistb
co-and-architecture
addressing-modes
instruction-format
2
votes
4
answers
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NIELIT 2017 DEC Scientist B - Section B: 47
INCA(Increase register A by $1$) is an example of which of the following addressing mode? Immediate addressing Indirect addressing Implied addressing Relative addressing
Lakshman Patel RJIT
asked
in
CO and Architecture
Mar 30, 2020
by
Lakshman Patel RJIT
1.8k
views
nielit2017dec-scientistb
co-and-architecture
addressing-modes
1
vote
2
answers
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NIELIT 2017 DEC Scientist B - Section B: 59
A two-word instruction is stored in a location $A$. The operand part of instruction holds $B$. If the addressing mode is relative, the operand is available in location $A+B+2$ $A+B+1$ $B+1$ $A+B$
Lakshman Patel RJIT
asked
in
CO and Architecture
Mar 30, 2020
by
Lakshman Patel RJIT
994
views
nielit2017dec-scientistb
co-and-architecture
addressing-modes
0
votes
3
answers
17
UGC NET CSE | January 2017 | Part 3 | Question: 4
Match the following : ... $\text{a-iv, b-ii, c-i, d-iii}$ $\text{a-iv, b-iii, c-ii, d-i}$
go_editor
asked
in
CO and Architecture
Mar 24, 2020
by
go_editor
981
views
ugcnetcse-jan2017-paper3
co-and-architecture
addressing-modes
3
votes
5
answers
18
ISRO2020-15
A stack organized computer is characterised by instructions with indirect addressing direct addressing zero addressing index addressing
Satbir
asked
in
CO and Architecture
Jan 13, 2020
by
Satbir
3.0k
views
isro-2020
co-and-architecture
addressing-modes
normal
1
vote
1
answer
19
ISRO2020-3
Which of the following affects the processing power assuming they do not influence each other Data bus capability Address scheme Clock speed $3$ only $1$ and $3$ only $2$ and $3$ only $1,2$ and $3$
Satbir
asked
in
CO and Architecture
Jan 13, 2020
by
Satbir
2.2k
views
isro-2020
co-and-architecture
addressing-modes
normal
4
votes
4
answers
20
ISRO2020-1
The immediate addressing mode can be used for Loading internal registers with initial values Perform arithmetic or logical operation on data contained in instructions Which of the following is true? Only $1$ Only $2$ Both $1$ and $2$ Immediate mode refers to data in cache
Satbir
asked
in
CO and Architecture
Jan 13, 2020
by
Satbir
2.0k
views
isro-2020
co-and-architecture
normal
addressing-modes
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Please upload updated previous year question...
The last hardcopy that was made was for GATE 2022...
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can we get 2023 hark copy from amazon?