Recent questions tagged addressing-modes

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1

Memory Access-self doubt
what is the number of memory accessed required in register indirect mode index register mode base register mode pls explain in details with examples

asked Nov 30 in CO & Architecture by aditi19 Active (1.9k points) | 23 views

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0 answers

2

MADE EASY TEST SERIES
WHY OPTION C IS ANS ???? I UNDER STAND THAT 128.44.82.1 ASSIGN TO 1ST NODE BUT WHY NOT 128.44.82.127 TO LAST ONE???

asked Nov 30 in Computer Networks by CHïntän ÞäTël (203 points) | 32 views

+1 vote

1 answer

3

Addressing Mode
Consider we have an instruction Load 1000. Given Memory and Register R1 as Follows. What is the actual value Loaded in the accumulator ? A. 1000 1400 1300 1000 B. 1400 1300 1000 1000 C. 1000 1300 1400 1000 D. 1300 1000 1400 1000

asked Oct 12 in CO & Architecture by Na462 Loyal (7.4k points) | 77 views

+1 vote

1 answer

4

TESTBOOK TEST SERIES

asked Sep 30 in CO & Architecture by Avik Chowdhury Junior (837 points) | 96 views

+1 vote

0 answers

5

self doubt
How stack addressing is related to Reentranecy ,can anyone explain it?

asked Sep 27 in CO & Architecture by Prince Sindhiya Active (5.2k points) | 28 views

0 votes

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6

Self Doubt on GATE2005-65
https://gateoverflow.in/1388/gate2005-65 $\text{In this question, what will be the number of }$ $\textbf{cycles}$ $\text{needed during execution cycle of instruction}$ $\text{According to me I am getting 6 cycles. Please tell what could be the correct answer for it}$

asked Sep 10 in CO & Architecture by !KARAN Junior (887 points) | 70 views

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7

Addressing Instructions
Are memory to memory instructions allowed? Eg. ADD [123], [345] or MOV [123], [343] If not, then why?

asked Sep 6 in CO & Architecture by Asutosh (439 points) | 47 views

+4 votes

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8

Addressing Mode
Addressing Mode. Instruction Meaning Description $1.$Register Addressing Mode (or) Register Direct AM $\text{Add} R_{1},R_{2}$ $R_{1}\leftarrow R_{1}+R_{2}$ ... ? Plz check https://www.slideshare.net/aliasgharmanjotho11/addressing-modes-37108170 http://web.cs.iastate.edu/~prabhu/Tutorial/PIPELINE/addressMode.html

asked Aug 28 in CO & Architecture by srestha Veteran (103k points) | 87 views

+1 vote

0 answers

9

Addressing modes
Instructions are stored in memory. When they are to be executed they are brought into instruction register. Now it is divided as Mode, opcode, operand (log (memory size) is divided in three parts) . In direct addressing, operand represent the effective ... required to address a memory then how such a big instruction is stored in memory whose operand itself has those many bits?

asked Aug 15 in CO & Architecture by tusharp Active (2.8k points) | 90 views

+3 votes

1 answer

10

Instruction Addressing
A computer has 170 different operations. Word size is 4 bytes one word instructions requires two address fields. One address for register and one address for memory. If there are 37 registers then the memory size is ______________(in KB). Ans. 256KB

asked Jul 31 in CO & Architecture by Na462 Loyal (7.4k points) | 177 views

+1 vote

1 answer

11

Addressing mode

asked May 27 in CO & Architecture by Prateek Raghuvanshi Loyal (7.7k points) | 137 views

+1 vote

2 answers

12

addressing modes

asked May 10 in CO & Architecture by Sanjay Sharma Boss (49.9k points) | 116 views

+1 vote

1 answer

13

Addressing mode
Plz describe Which addressing mode does this following line represents and how? Index addressing mode, $X\left ( R_{1} \right )$, where $X$ is an offset represented in $2$'s complement $16$ bit representation

asked Apr 26 in CO & Architecture by srestha Veteran (103k points) | 121 views

+2 votes

1 answer

14

Addressing Mode
Adding a constant to the content of register Is it a)Immediate mode or b) Indexed mode?

asked Apr 15 in CO & Architecture by srestha Veteran (103k points) | 226 views

+4 votes

1 answer

15

CO Addressing
A computer has 32 bit instruction and 12 bit address . If there are 250 two address instructions , the no. of one -address instructions can be ..... Plz formulate a generic solution for this with diagram .

asked Jan 25 in CO & Architecture by ashwina Active (2.1k points) | 191 views

+5 votes

1 answer

16

Addresing mode
Please Explain in detail

asked Jan 16 in CO & Architecture by Shubham Kumar Gupta Junior (615 points) | 125 views

+4 votes

0 answers

17

CO: Addressing Mode Question

asked Jan 11 in CO & Architecture by thepeeyoosh Active (2.1k points) | 215 views

+1 vote

1 answer

18

Effective Address Calculation
Plz discuss every part with detailed solution with diagram .

asked Jan 2 in CO & Architecture by ashwina Active (2.1k points) | 401 views

+2 votes

1 answer

19

Addressing Modes
How many memory accesses required by the following instructions? SUB r1, r2, r3 MUL r1, r2, (r3) DIV r1, r2, @(r4) Suppose every instruction is one word long, as well as every address. (A) 4 (B) 6 (C) 8 (D) 9

asked Dec 20, 2017 in CO & Architecture by ankitgupta.1729 Loyal (8.3k points) | 216 views

+2 votes

0 answers

20

Relative Addressing Mode
A two- word instruction is stored in a location A. The operand part of instruction holds B. If the addressing mode is relative , the operand is available in location : A. A+B+2 B.A+B+1 C.B+1 D.A+B Explain with diagram.

asked Dec 17, 2017 in CO & Architecture by ashwina Active (2.1k points) | 504 views

+3 votes

2 answers

21

ISRO-DEC2017-43
Consider an instruction of the type $\text{LW R1, 20(R2)}$ which during execution reads a $32$-$bit$ word from memory and stores it in a $32$-$bit$ register $R1.$ The effective address of the memory location is obtained ... $20$ and contents of $R2.$ Which one best reflects the source operand? Immediate addressing Register addressing Register Indirect addressing Indexed addressing

asked Dec 17, 2017 in CO & Architecture by gatecse Boss (18.3k points) | 546 views

+5 votes

1 answer

22

Addressing Mode
"The Address Part of the Index Addressing mode Instruction must set to zero,to behave like Register Indirect Mode Instruction" IS IT A VALID STATEMENT ?

asked Nov 23, 2017 in CO & Architecture by junaid ahmad Loyal (9.1k points) | 196 views

+4 votes

1 answer

23

CO - Addressing

asked Nov 8, 2017 in CO & Architecture by Anup patel Active (3.9k points) | 122 views

+1 vote

0 answers

24

Addressing modes
Computer uses addressing modes to reduce number of bits in the addressing field of instruction. Justify this statement and give relevant reasons.

asked Nov 7, 2017 in CO & Architecture by just_bhavana Boss (12.2k points) | 83 views

+3 votes

1 answer

25

Addressing Mode
I have a doubt PC Relative addressing modes permits relocation without any change whatsoever in the code,but why not Base register addressing as both addressing mode are similar? Plz can anybody explain? According to this https://cs.stackexchange.com/questions/48730 ... PC Relative is correct answer! or is it the case that Pc relative mode make more sense then Base addressing mode.

asked Nov 7, 2017 in CO & Architecture by Na462 Loyal (7.4k points) | 85 views

+1 vote

2 answers

26

UGC NET-PaperIII Nov2017(4)
4. Which of the following addressing mode is best suited to access elements of an array of contiguous memory locations? (1)Indexed addressing Mode (2)Base Register addressing Mode (3)Relative address Mode (4)displacement mode

asked Nov 6, 2017 in Digital Logic by mahalakshmi r (105 points) | 1.2k views

+1 vote

0 answers

27

Addressing modes
Can somebody explain what is indirect indexed addressing mode ? Is it similar to indexed addressing mode ? Will the effective address be calculated by adding some constant to the content of some register as is done in indexed AM ? Any help would be appreciated.

asked Nov 6, 2017 in CO & Architecture by sumit chakraborty Active (1.2k points) | 123 views

+3 votes

1 answer

28

UGCNET-Nov2017-iii-4
Which of the following addressing mode is best suited to access elements of an array of contiguous memory locations? Indexed addressing mode Base Register addressing mode Relative address mode Displacement mode

asked Nov 5, 2017 in CO & Architecture by Arjun Veteran (367k points) | 188 views

+2 votes

1 answer

29

addressing mode reduces no of bits?
computer uses addressing modes to reduce the number of bits in the addressing field of the instruction Can someone please explain how this statement is true? PLEASE Examples will be helpful

asked Nov 5, 2017 in CO & Architecture by Rishabh Gupta 2 Boss (15.2k points) | 239 views

+2 votes

2 answers

30

addressing modes
How many memory cycles are required with following Addressing modes? 1. Indirect mode : 2 2. Absolute mode :1 3.Indexed Mode : Confusion here as offset is a constant so according to me it should be there in memory so 1 clock cyle to fetch ... machine cycle 5. Register indirect mode : 1 machine cycle Am i right ? and local variables mostly uses direct addressing mode right ?

asked Oct 25, 2017 in CO & Architecture by Na462 Loyal (7.4k points) | 366 views

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