Recent questions tagged addressing-modes

0 votes

1 answer

1

Self doubt
Can anyone please explain in simple terms indexed, relative and base register addressing modes?

asked Jan 19 in CO & Architecture by subho16 (129 points) | 32 views

0 votes

0 answers

2

What is mean by "Index Value" in Indexed Addressing Mode?
If someone mentioned "index value" in indexed addressing mode then which value is it referring; the value of index register or the constant value? It should be value of index register, isn't it? But from the given snippet it seems that they are referring constant value Please clarify Thank You

asked Jan 8 in CO & Architecture by newbie (59 points) | 56 views

0 votes

0 answers

3

Indirect index addressing mode
I know indirect addressing mode , Index addressing mode but do not know Indirect index addressing mode ? in one solution of a question they told that Indirect index addressing mode does not add some constant value (base address etc ) while calculating the effective address i did not found it on google etc

asked Jan 4 in CO & Architecture by Gurdeep Saini Loyal (8.3k points) | 38 views

0 votes

1 answer

4

NTA NET DEC 2018 Q44

asked Dec 25, 2018 in CO & Architecture by Sanjay Sharma Veteran (50.5k points) | 58 views

0 votes

1 answer

5

Memory Access-self doubt
what is the number of memory accessed required in register indirect mode index register mode base register mode pls explain in details with examples

asked Nov 30, 2018 in CO & Architecture by aditi19 Active (2.3k points) | 53 views

+1 vote

1 answer

6

Addressing Mode
Consider we have an instruction Load 1000. Given Memory and Register R1 as Follows. What is the actual value Loaded in the accumulator ? A. 1000 1400 1300 1000 B. 1400 1300 1000 1000 C. 1000 1300 1400 1000 D. 1300 1000 1400 1000

asked Oct 12, 2018 in CO & Architecture by Na462 Loyal (8.6k points) | 131 views

+1 vote

1 answer

7

TESTBOOK TEST SERIES
A register to register machine supports 2-address. 1-address and zero-address instructions instruction register size is 24 bits and register set size is 480. If there are 48 2-address instructions and 2048 Zero - address instructions then what is the maximum possible number of 1 - address instruction?

asked Sep 30, 2018 in CO & Architecture by Avik Chowdhury Junior (901 points) | 123 views

+1 vote

0 answers

8

self doubt
How stack addressing is related to Reentranecy ,can anyone explain it?

asked Sep 27, 2018 in CO & Architecture by Prince Sindhiya Loyal (6.2k points) | 37 views

0 votes

0 answers

9

Self Doubt on GATE2005-65
https://gateoverflow.in/1388/gate2005-65 $\text{In this question, what will be the number of }$ $\textbf{cycles}$ $\text{needed during execution cycle of instruction}$ $\text{According to me I am getting 6 cycles. Please tell what could be the correct answer for it}$

asked Sep 10, 2018 in CO & Architecture by !KARAN Active (1.2k points) | 87 views

0 votes

0 answers

10

Addressing Instructions
Are memory to memory instructions allowed? Eg. ADD [123], [345] or MOV [123], [343] If not, then why?

asked Sep 6, 2018 in CO & Architecture by Asutosh (491 points) | 62 views

+5 votes

0 answers

11

Addressing Mode
Addressing Mode. Instruction Meaning Description $1.$Register Addressing Mode (or) Register Direct AM $\text{Add} R_{1},R_{2}$ $R_{1}\leftarrow R_{1}+R_{2}$ ... ? Plz check https://www.slideshare.net/aliasgharmanjotho11/addressing-modes-37108170 http://web.cs.iastate.edu/~prabhu/Tutorial/PIPELINE/addressMode.html

asked Aug 28, 2018 in CO & Architecture by srestha Veteran (108k points) | 131 views

+1 vote

0 answers

12

Addressing modes
Instructions are stored in memory. When they are to be executed they are brought into instruction register. Now it is divided as Mode, opcode, operand (log (memory size) is divided in three parts) . In direct addressing, operand represent the effective ... required to address a memory then how such a big instruction is stored in memory whose operand itself has those many bits?

asked Aug 15, 2018 in CO & Architecture by tusharp Active (4.4k points) | 129 views

+3 votes

1 answer

13

Instruction Addressing
A computer has 170 different operations. Word size is 4 bytes one word instructions requires two address fields. One address for register and one address for memory. If there are 37 registers then the memory size is ______________(in KB). Ans. 256KB

asked Jul 31, 2018 in CO & Architecture by Na462 Loyal (8.6k points) | 240 views

+1 vote

1 answer

14

Addressing mode

asked May 27, 2018 in CO & Architecture by Prateek Raghuvanshi Loyal (9.6k points) | 153 views

+1 vote

2 answers

15

addressing modes

asked May 10, 2018 in CO & Architecture by Sanjay Sharma Veteran (50.5k points) | 157 views

+1 vote

1 answer

16

Addressing mode
Plz describe Which addressing mode does this following line represents and how? Index addressing mode, $X\left ( R_{1} \right )$, where $X$ is an offset represented in $2$'s complement $16$ bit representation

asked Apr 26, 2018 in CO & Architecture by srestha Veteran (108k points) | 149 views

+2 votes

1 answer

17

Addressing Mode
Adding a constant to the content of register Is it a)Immediate mode or b) Indexed mode?

asked Apr 15, 2018 in CO & Architecture by srestha Veteran (108k points) | 257 views

+4 votes

1 answer

18

CO Addressing
A computer has 32 bit instruction and 12 bit address . If there are 250 two address instructions , the no. of one -address instructions can be ..... Plz formulate a generic solution for this with diagram .

asked Jan 25, 2018 in CO & Architecture by ashwina Active (2.1k points) | 243 views

+5 votes

1 answer

19

Addresing mode
Please Explain in detail

asked Jan 16, 2018 in CO & Architecture by Shubham Kumar Gupta Junior (683 points) | 145 views

+4 votes

0 answers

20

CO: Addressing Mode Question

asked Jan 11, 2018 in CO & Architecture by thepeeyoosh Active (2.1k points) | 384 views

+1 vote

1 answer

21

Effective Address Calculation
Plz discuss every part with detailed solution with diagram .

asked Jan 2, 2018 in CO & Architecture by ashwina Active (2.1k points) | 575 views

+2 votes

1 answer

22

Addressing Modes
How many memory accesses required by the following instructions? SUB r1, r2, r3 MUL r1, r2, (r3) DIV r1, r2, @(r4) Suppose every instruction is one word long, as well as every address. (A) 4 (B) 6 (C) 8 (D) 9

asked Dec 20, 2017 in CO & Architecture by ankitgupta.1729 Loyal (9.2k points) | 256 views

+2 votes

0 answers

23

Relative Addressing Mode
A two- word instruction is stored in a location A. The operand part of instruction holds B. If the addressing mode is relative , the operand is available in location : A. A+B+2 B.A+B+1 C.B+1 D.A+B Explain with diagram.

asked Dec 17, 2017 in CO & Architecture by ashwina Active (2.1k points) | 579 views

+3 votes

2 answers

24

ISRO-DEC2017-43
Consider an instruction of the type $\text{LW R1, 20(R2)}$ which during execution reads a $32$-$bit$ word from memory and stores it in a $32$-$bit$ register $R1.$ The effective address of the memory location is obtained ... $20$ and contents of $R2.$ Which one best reflects the source operand? Immediate addressing Register addressing Register Indirect addressing Indexed addressing

asked Dec 17, 2017 in CO & Architecture by gatecse Boss (18.3k points) | 568 views

+5 votes

1 answer

25

Addressing Mode
"The Address Part of the Index Addressing mode Instruction must set to zero,to behave like Register Indirect Mode Instruction" IS IT A VALID STATEMENT ?

asked Nov 23, 2017 in CO & Architecture by junaid ahmad Loyal (9.4k points) | 220 views

+4 votes

1 answer

26

CO - Addressing

asked Nov 8, 2017 in CO & Architecture by Anup patel Active (4k points) | 140 views

+1 vote

0 answers

27

Addressing modes
Computer uses addressing modes to reduce number of bits in the addressing field of instruction. Justify this statement and give relevant reasons.

asked Nov 7, 2017 in CO & Architecture by just_bhavana Boss (12.4k points) | 88 views

+3 votes

1 answer

28

Addressing Mode
I have a doubt PC Relative addressing modes permits relocation without any change whatsoever in the code,but why not Base register addressing as both addressing mode are similar? Plz can anybody explain? According to this https://cs.stackexchange.com/questions/48730 ... PC Relative is correct answer! or is it the case that Pc relative mode make more sense then Base addressing mode.

asked Nov 7, 2017 in CO & Architecture by Na462 Loyal (8.6k points) | 98 views

+1 vote

2 answers

29

UGC NET-PaperIII Nov2017(4)
4. Which of the following addressing mode is best suited to access elements of an array of contiguous memory locations? (1)Indexed addressing Mode (2)Base Register addressing Mode (3)Relative address Mode (4)displacement mode

asked Nov 6, 2017 in Digital Logic by mahalakshmi r (105 points) | 1.2k views

+1 vote

0 answers

30

Addressing modes
Can somebody explain what is indirect indexed addressing mode ? Is it similar to indexed addressing mode ? Will the effective address be calculated by adding some constant to the content of some register as is done in indexed AM ? Any help would be appreciated.

asked Nov 6, 2017 in CO & Architecture by sumit chakraborty Active (1.3k points) | 134 views

tags	tag:apple
author	user:martin
title	title:apple
content	content:apple
exclude	-tag:apple
force match	+apple
views	views:100
score	score:10
answers	answers:2
is accepted	isaccepted:true
is closed	isclosed:true

Recent questions tagged addressing-modes

Recent Posts

Recent Blog Comments