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Recent questions tagged addressing-modes
1
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MADE EASY TEST SERIES 2024 #COA
Consider 16 bit CPU with 4 GB RAM supports 2 Address Instruction with Address 1 uses direct addressing mode Address2 uses indirect addressing mode. Opcode is designed as ADD operation with Address 1 used as Source1 and Destination, Address2 used ... operation consumes 4 cycles. Memory reference consumes 6 cycles. Time required to complete the instruction is in (ns).
Consider 16 bit CPU with 4 GB RAM supports 2 Address Instruction with Address 1 uses direct addressing mode Address2 uses indirect addressing mode. Opcode is designed as ...
Shaikh727
433
views
Shaikh727
asked
Jan 24
CO and Architecture
co-and-architecture
made-easy-test-series
addressing-modes
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1
votes
4
answers
2
Made Easy Test Series 2024
( Numerical Answer Type Questionm )
( Numerical Answer Type Questionm )
Ray Tomlinson
787
views
Ray Tomlinson
asked
Sep 6, 2023
CO and Architecture
made-easy-test-series
co-and-architecture
addressing-modes
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0
votes
1
answer
3
Addressing mode
lea
377
views
lea
asked
Jun 12, 2023
Operating System
operating-system
addressing-modes
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0
votes
2
answers
4
Addressing mode
lea
329
views
lea
asked
Jun 12, 2023
CO and Architecture
co-and-architecture
addressing-modes
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0
votes
1
answer
5
Addressing Modes
lea
305
views
lea
asked
Jun 12, 2023
CO and Architecture
co-and-architecture
addressing-modes
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0
votes
0
answers
6
Relative Addressing Mode
Consider 3-word long jump instruction designed with PC-relative addressing mode, stored in the memory with a starting address of (2000)$_{10}$. Address field of an instruction contains (4000)$_{10}.$ Which of the following statements are true in the instruction ... where operand is stored, then how we can we assign it to PC? PC should be 2003 at the end of execution right?
Consider 3-word long jump instruction designed with PC-relative addressing mode, stored in the memory with a starting address of (2000)$_{10}$. Address field of an instru...
Chaitanya Kale
624
views
Chaitanya Kale
asked
Feb 13, 2023
CO and Architecture
addressing-modes
co-and-architecture
made-easy-test-series
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0
votes
1
answer
7
consider 16tb disk that uses 4kb block and free list method. how many block address can be stored in a block
Shubham Kathiriya
601
views
Shubham Kathiriya
asked
Jan 26, 2023
Operating System
operating-system
addressing-modes
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0
votes
1
answer
8
Addressing Modes
When we write MOV #1000 , it means we are writing the value 1000 into the accumulator. But when we write MOV 1000 here 1000 refers to address of what ? register or MM ? (knowing that MOV works only between registers).
When we write MOV #1000 , it means we are writing the value 1000 into the accumulator. But when we write MOV 1000 here 1000 refers to address of what ? register or MM ? (...
Aaryan_Sharma
378
views
Aaryan_Sharma
asked
Dec 30, 2022
CO and Architecture
co-and-architecture
addressing-modes
goclasses
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0
votes
0
answers
9
Best Open Video Playlist for Addressing Modes Topic | CO & A
Please list out the best free available video playlist for Addressing Modes from CO & A as an answer here (only one playlist per answer). We'll then select the best playlist and add to GO classroom video lists. You ... but standard ones are more likely to be selected as best. For the full list of selected videos please see here
Please list out the best free available video playlist for Addressing Modes from CO & A as an answer here (only one playlist per answer). We'll then select the best playl...
makhdoom ghaya
261
views
makhdoom ghaya
asked
Aug 15, 2022
Study Resources
go-classroom
video-links
missing-videos
free-videos
addressing-modes
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0
votes
1
answer
10
#addressing modes
How to implement indirect addressing mode using register indirect addressing mode???
How to implement indirect addressing mode using register indirect addressing mode???
Subbu.
346
views
Subbu.
asked
Aug 3, 2022
CO and Architecture
co-and-architecture
addressing-modes
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2
votes
1
answer
11
Addressing modes
Could you please explain How we can implement indirect addressing mode using Index addressing mode.. and vice versa..??
Could you please explain How we can implement indirect addressing mode using Index addressing mode.. and vice versa..??
Subbu.
517
views
Subbu.
asked
Jul 14, 2022
CO and Architecture
co-and-architecture
addressing-modes
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0
votes
1
answer
12
Applied Test Series
Consider a processor that includes a base with indexing addressing mode. Suppose an instruction is encountered that employs this addressing mode and specifies a displacement of 1970, in decimal. Currently the base and index register contain the decimal numbers 48,022 and 8, respectively. What is the address of the operand?
Consider a processor that includes a base with indexing addressing mode. Suppose an instruction is encountered that employs this addressing mode and specifies a displacem...
Sagar475
1.1k
views
Sagar475
asked
Jan 7, 2022
CO and Architecture
co-and-architecture
addressing-modes
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1
votes
2
answers
13
NIELIT STA 2021
The addressing mode / s, which uses the PC instead of a general-purpose register is: Indexed with offset Relative Direct Both Indexed with offset and direct
The addressing mode / s, which uses the PC instead of a general-purpose register is: Indexed with offset RelativeDirectBoth Indexed with offset and direct
rsansiya111
1.6k
views
rsansiya111
asked
Dec 6, 2021
CO and Architecture
co-and-architecture
addressing-modes
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