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Recent questions tagged carry-generator

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1
NIELIT 2016 MAR Scientist B - Section C: 2
In which of the following adder circuits, the carry look ripple delay is eliminated? Half adder Full adder Parallel adder Carry-look ahead adder
In which of the following adder circuits, the carry look ripple delay is eliminated?Half adderFull adderParallel adderCarry-look ahead adder
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1 votes
3 answers
4
Full adder
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2 answers
7
Full adder
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1 answer
8
Adder
One ripple carry adder is adding two n-bit integers. The time complexity to perform addition using this adder is (We know carry look ahead adder takes time log n. Is it similar for other adders too). Plz also share some good resource about these two adders
One ripple carry adder is adding two n-bit integers. The time complexity to perform addition using this adder is (We know carry look ahead adder takes time log n. Is it s...
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1 votes
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9
CLA and RCA delays.
How to analyse the delays of Ripple carry adder and Carry look ahead adder. Please explain with Example.
How to analyse the delays of Ripple carry adder and Carry look ahead adder.Please explain with Example.
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1 votes
2 answers
10
Carry lookahead adder
can anyone tell me wat is the right equation for carry generator in carry lookahead adder ?? Confused .. $ C_{i} = G_{i}+P_{i}C_{i-1}$ $ C_{i+1}=G_{}i+P_{}iC_{}i$
can anyone tell me wat is the right equation for carry generator in carry lookahead adder ?? Confused ..$ C_{i} = G_{i}+P_{i}C_{i-1}$$ C_{i+1}=G_{}i+P_{}iC_{}i$
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11
Ripple Carry Adder
Q.A one bit full adder takes 75 nsec to produce sum and 50 nsec to produce carry.A 4 bit parallel adder is designed using this type of full adder. The maximum rate of additions per second can be provided by 4 bit parallel adder......?
Q.A one bit full adder takes 75 nsec to produce sum and 50 nsec to produce carry.A 4 bit parallel adder is designed using this type of full adder. The maximum rate of add...
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2 votes
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12
Doubt on overflow condition in case of carry propagated
The condition for overflow in the addition of two 2's complement numbers in terms of the carry propagated by the two most significant bits is ___________.
The condition for overflow in the addition of two 2's complement numbers in terms of the carry propagated by the two most significant bits is ___________.
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14
Which expression is right with respect to carry look header?
(i) Ci +1= Gi+ PiCi (ii) Ci +1= G(i+1) + P(i+1)Ci https://www.youtube.com/watch?v=9lyqSVKbyz8&index=116&list=PLBlnK6fEyqRjMH3mWf6kwqiTbT798eAOm i or ii ?
(i) Ci +1= Gi+ PiCi(ii) Ci +1= G(i+1) + P(i+1)Cihttps://www.youtube.com/watch?v=9lyqSVKbyz8&index=116&list=PLBlnK6fEyqRjMH3mWf6kwqiTbT798eAOmi or ii ?
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2 votes
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15
MadeEasy Test Series: Digital Logic - Carry Generator
The number of AND gates are present inside a 5-bit carry look ahead generator circuit are ______.
The number of AND gates are present inside a 5-bit carry look ahead generator circuit are ______.
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70 votes
6 answers
16
GATE CSE 2006 | Question: 36
Given two three bit numbers $a_{2}a_{1}a_{0}$ and $b_{2}b_{1}b_{0}$ and $c$ ...
Given two three bit numbers $a_{2}a_{1}a_{0}$ and $b_{2}b_{1}b_{0}$ and $c$ the carry in, the function that represents the carry generate function when these two numbers ...
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