Recent questions tagged co-and-architecture

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What is the default access method of Cache Memory? Simultaneous or Hierarchical?
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When we write MOV #1000 , it means we are writing the value 1000 into the accumulator. But when we write MOV 1000 here 1000 refers to address of what ? register or MM ? (...
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187
In $T_{Read Avg}$, shouldn’t it be $T_{Read Avg}$ = (10*0.9) + 0.1*(10+100), because it must be checking the cache in case of cache miss too, right?
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188
What is the difference b/w cache & TLB? TLB is stored in cache too right? TLB helps in addressing like a faster version of page table while speaking of cache, it directly...
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190
If a processor has 32-bit virtual address, 28-bit physical address, 2 kb pages. How many bits are required for the virtual, physical page number?17, 2121, 176, 10NoneThe ...