# Recent questions tagged combinational-circuits 1
How many $2$-input multiplexers are required to construct a $2^{10}$ input multiplexer? $1023$ $31$ $10$ $127$
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1 vote
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How many RAM chips of size $(256K \times 1 \text{ bit})$ are required to build $1$M Byte memory? $8$ $10$ $24$ $32$
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Disadvantage of dynamic RAM over static RAM is higher power consumption. variable speed. need to refresh the capacitor charge every once in two milliseconds. higher bit density.
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The Circuit is equivalent to: EX-OR Gate NAND Gate OR Gate AND Gate
1 vote
6
How many inputs are required in Full Adder Circuit? $2$ $3$ More than two inputs None of the above
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The Circuit is equivalent to: $OR$ Gate $NOR$ Gate $AND$ Gate $EX-OR$ Gate
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Which one of the following is true? NAND gate and AND gate both are universal gates NOR gate and OR gate both are universal gates NAND gate and OR gate both are universal gates NAND gate and NOR gate both are universal gates
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Which one of the following is the function of a multiplexer? To decode information To select $1$ out of $N$ input data sources and to transmit it to single channel To transmit data on $N$ lines To perform serial to parallel conversion
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The digital multiplexer is basically a combination logic circuit to perform the operation AND-AND OR-OR AND-OR OR-AND
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To make the following circuit a tautology ‘?’ marked box should be OR gate AND gate NAND gate EX-OR gate
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In the following gate network which gate is redundant? Gate no.$1$ Gate no.$2$ Gate no.$3$ Gate no.$4$
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The combinational circuit given below is implemented with two NAND gates. To which of the following individual gates is its equivalent? NOT OR AND XOR
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If $ABCD$ is a $4$-bit binary number, then what is the code generated by the following circuit? BCD code Gray code $8421$ code Excess-$3$ code
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Minimum number of NAND gates required to implement the following binary equation $Y = (\overline{A}+\overline{B})(C+D)$ $4$ $5$ $3$ $6$
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Consider the following circuit The function by the network above is $\overline{AB}E+EF+\overline{CD}F$ $(\overline{E}+AB\overline{F})(C+D+\overline{F})$ $(\overline{AB}+E)(\overline{E}+\overline{F})(C+D+\overline{F})$ $(A+B)\overline{E} +\overline{EF}+CD\overline{F}$
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Following Multiplexer circuit is equivalent to Sum equation of full adder Carry equation of full adder Borrow equation for full subtractor Difference equation of a full subtractor
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In a $8$-bit ripple carry adder using identical full adders, each full adder takes $34$ ns for computing sum. If the time taken for $8$-bit addition is $90$ ns, find time taken by each full adder to find carry. $6$ ns $7$ ns $10$ ns $8$ ns
1 vote
19
What will be solution of recurrence relation if roots are like this: r1=-2, r2=2, r3=-2, r4=2 is this the case of repetitive roots?
20
A shipping clerk has to weigh 10 distinct packets. He weighs them four at a time, weighing all the possible combinations of the packets from the ten. The average weight of all the weighing combination is found to be 800 gm. What is the combined weight of all the size packets?
21
List the PLA programming table for the BCD-to-excess-3-code converter whose boolean functions are given in the figure. repeat the above problem using a PAL.
22
Derive the PLA Programming table for the combinational circuit that square a 3-bit number.Minimize the number of product term.
23
Tabulate the PLA programming table for the four boolean functions given. Minimize the number of product terms. $A(x,y,z) = \sum (1,2,4,6)$ $B(x,y,z) = \sum (0,1,6,7)$ $C(x,y,z) = \sum (2,6)$ $D(x,y,z) = \sum (1,2,3,5,7)$
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Tabulate a truth table for an $8 \times 4$ ROM that implements the following four boolean functions: $A(x,y,z) = \sum (1,2,4,6)$ $B(x,y,z) = \sum (0,1,6,7)$ $C(x,y,z) = \sum (2,6)$ $D(x,y,z) = \sum (1,2,3,5,7)$
25
specify the size of a ROM ( Number of words and number of bits per words) that will accommodate the truth table for the following combinational circuit components: A binary multiplexer that multiplies two 4-bit numbers. A 4-bit adder-subtractor. A quadruple 2-to-1 line multiplexer with common select and enable inputs. A BCD-to-seven-segment decoder with an enable input.
1 vote
26
A ROM chip of 4096 $\times$ 8 bits has two enable inputs and operates from a 5-volt power supply. How many pins are needed for the integrated-circuit package? draw a block diagram and label all the input and output terminals in the ROM
27
given a $32 \times 8$ ROM chip with the enable input, show the external connection which is necessary to construct a $128 \times 8$ ROM with 4 chips and a Decoder.
1 vote
Implement the following boolean function with $4 \times 1$ multiplexer and external gates, connect A and B to selection lines. The input requirement for the four lines will be a function of C and D. These values are obtained by expressing F as a function of C and D for each of the four ... These functions may have to be implemented with the external gates. $F(A,B,C,D) = \sum(1,3,4,11,12,13,14,15)$
An $8 \times 1$ multiplexer has inputs A,B and C connected to the selection inputs $s _2,s _1$ and $s _0$ respectively.The data inputs $I _0$ through $I _7$ are as follows: $I _1 = I _2 = I _7 = 0$; $I _3 = I _5 = 1$; $I _0 = I _4 = D$; and $I _6 = D’$.Determine the boolean function that the multiplexer implements.
Implement the boolean function $F(A,B,C,D) = \sum(0,1,3,4,8,9,15)$ with an $8 \times 1$multiplexer, but with inputs A,B and C connected to selection inputs $s _2,s _1$ and $s _0$ respectively.