The Gateway to Computer Science Excellence
For all GATE CSE Questions
Toggle navigation
Facebook Login
or
Email or Username
Password
Remember
Login
Register

I forgot my password
Activity
Questions
Unanswered
Tags
Subjects
Users
Ask
Prev
Blogs
New Blog
Exams
Recent questions tagged combinationalcircuits
+2
votes
2
answers
1
ISRO202012
If $ABCD$ is a $4$bit binary number, then what is the code generated by the following circuit? BCD code $8421$ code Gray code Excess$3$ code
asked
Jan 13
in
Digital Logic
by
Satbir
Boss
(
23.8k
points)

147
views
isro2020
digitallogic
combinationalcircuits
normal
+1
vote
1
answer
2
ISRO202011
Minimum number of NAND gates required to implement the following binary equation $Y = (\bar{A}+\bar{B})(C+D)$ $4$ $5$ $3$ $6$
asked
Jan 13
in
Digital Logic
by
Satbir
Boss
(
23.8k
points)

164
views
isro2020
digitallogic
combinationalcircuits
normal
+1
vote
2
answers
3
ISRO202077
Consider the following circuit The function by the network above is $\overline{AB}E+EF+\overline{CD}F$ $(\overline{E}+AB\overline{F})(C+D+\overline{F})$ $(\overline{AB}+E)(\bar{E}+\bar{F})(C+D+\overline{F})$ $(A+B)\overline{E} +\overline{EF}+CD\overline{F}$
asked
Jan 13
in
Digital Logic
by
Satbir
Boss
(
23.8k
points)

135
views
isro2020
digitallogic
combinationalcircuits
normal
+1
vote
1
answer
4
ISRO202010
Following Multiplexer circuit is equivalent to Sum equation of full adder Carry equation of full adder Borrow equation for full subtractor Difference equation of a full subtractor
asked
Jan 13
in
Digital Logic
by
Satbir
Boss
(
23.8k
points)

128
views
isro2020
digitallogic
combinationalcircuits
normal
+1
vote
1
answer
5
ISRO20209
In a $8$bit ripple carry adder using identical full adders, each full adder takes $34$ns for computing sum. If the time taken for $8$bit addition is $90$ ns, find time taken by each full adder to find carry. $6$ ns $7$ ns $10$ ns $8$ ns
asked
Jan 13
in
Digital Logic
by
Satbir
Boss
(
23.8k
points)

117
views
isro2020
digitallogic
combinationalcircuits
normal
0
votes
0
answers
6
Morris Mano Edition 3 Exercise 5 Question 35,36 (Page No. 201)
List the PLA programming table for the BCDtoexcess3code converter whose boolean functions are given in the figure. repeat the above problem using a PAL.
asked
Apr 4, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

26
views
digitallogic
combinationalcircuits
0
votes
0
answers
7
Morris Mano Edition 3 Exercise 5 Question 34 (Page No. 201)
Derive the PLA Programming table for the combinational circuit that square a 3bit number.Minimize the number of product term.
asked
Apr 4, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

10
views
digitallogic
combinationalcircuits
0
votes
0
answers
8
Morris Mano Edition 3 Exercise 5 Question 33 (Page No. 201)
Tabulate the PLA programming table for the four boolean functions given. Minimize the number of product terms. $A(x,y,z) = \sum (1,2,4,6)$ $B(x,y,z) = \sum (0,1,6,7)$ $C(x,y,z) = \sum (2,6)$ $D(x,y,z) = \sum (1,2,3,5,7)$
asked
Apr 4, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

48
views
digitallogic
combinationalcircuits
0
votes
0
answers
9
Morris Mano Edition 3 Exercise 5 Question 31 (Page No. 200)
Tabulate a truth table for an $8 \times 4$ ROM that implements the following four boolean functions: $A(x,y,z) = \sum (1,2,4,6)$ $B(x,y,z) = \sum (0,1,6,7)$ $C(x,y,z) = \sum (2,6)$ $D(x,y,z) = \sum (1,2,3,5,7)$
asked
Apr 4, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

16
views
digitallogic
combinationalcircuits
rom
0
votes
0
answers
10
Morris Mano Edition 3 Exercise 5 Question 31 (Page No. 200)
specify the size of a ROM ( Number of words and number of bits per words) that will accommodate the truth table for the following combinational circuit components: A binary multiplexer that multiplies two 4bit numbers. A 4 ... to1 line multiplexer with common select and enable inputs. A BCDtosevensegment decoder with an enable input.
asked
Apr 4, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

23
views
digitallogic
combinationalcircuits
multiplexer
rom
0
votes
0
answers
11
Morris Mano Edition 3 Exercise 5 Question 30 (Page No. 200)
A ROM chip of 4096 $\times$ 8 bits has two enable inputs and operates from a 5volt power supply. How many pins are needed for the integratedcircuit package? draw a block diagram and label all the input and output terminals in the ROM
asked
Apr 4, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

14
views
digitallogic
combinationalcircuits
rom
0
votes
0
answers
12
Morris Mano Edition 3 Exercise 5 Question 29 (Page No. 200)
given a $32 \times 8 $ ROM chip with the enable input, show the external connection which is necessary to construct a $128 \times 8$ ROM with 4 chips and a Decoder.
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

13
views
digitallogic
combinationalcircuits
rom
0
votes
0
answers
13
Morris Mano Edition 3 Exercise 5 Question 28 (Page No. 200)
Implement the following boolean function with $4 \times 1$ multiplexer and external gates, connect A and B to selection lines. The input requirement for the four lines will be a function of C and D. These values are obtained by expressing F as a function ... be implemented with the external gates. $F(A,B,C,D) = \sum(1,3,4,11,12,13,14,15)$
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

62
views
digitallogic
combinationalcircuits
multiplexer
0
votes
0
answers
14
Morris Mano Edition 3 Exercise 5 Question 27 (Page No. 200)
An $8 \times 1$ multiplexer has inputs A,B and C connected to the selection inputs $s _2,s _1$ and $s _0$ respectively.The data inputs $I _0$ through $I _7$ are as follows: $I _1 = I _2 = I _7 = 0$; $ I _3 = I _5 = 1$; $ I _0 = I _4 = D$; and $I _6 = D’$.Determine the boolean function that the multiplexer implements.
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

9
views
digitallogic
combinationalcircuits
multiplexer
0
votes
0
answers
15
Morris Mano Edition 3 Exercise 5 Question 26 (Page No. 200)
Implement the boolean function $F(A,B,C,D) = \sum(0,1,3,4,8,9,15)$ with an $8 \times 1$multiplexer, but with inputs A,B and C connected to selection inputs $s _2,s _1$ and $s _0$ respectively.
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

6
views
digitallogic
combinationalcircuits
0
votes
0
answers
16
Morris Mano Edition 3 Exercise 5 Question 25 (Page No. 200)
Implement a Full adder with two $4 \times 1$ multiplexers.
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

8
views
digitallogic
combinationalcircuits
multiplexer
0
votes
0
answers
17
Morris Mano Edition 3 Exercise 5 Question 24 (Page No. 200)
implement the following boolean function with an $8 \times 1$ multiplexer. $F(A,B,C,D) = \sum(0,3,5,6,8,9,14,15)$
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

5
views
digitallogic
combinationalcircuits
0
votes
0
answers
18
Morris Mano Edition 3 Exercise 5 Question 23 (Page No. 200)
Construct a $16 \times 1$ multiplexer with two $8 \times 1$ and one $ 2 \times 1$ multiplexers.use the block diagram for the three multiplexers.
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

10
views
digitallogic
combinationalcircuits
multiplexer
0
votes
0
answers
19
Morris Mano Edition 3 Exercise 5 Question 22 (Page No. 200)
Draw the logic diagram of a dual 4to1 line multiplexer with common selection inputs and a common enable input.
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

14
views
digitallogic
combinationalcircuits
multiplexer
0
votes
0
answers
20
Morris Mano Edition 3 Exercise 5 Question 21 (Page No. 200)
specify the truth table of an Octaltobinary priority encoder. Provide an output V to indicate that at least one of the input is 1. The input with the highest subscript number has the highest priority. What will be the value of the four outputs if input $D _3$ and $D _5$ are 1 and the other inputs are all )’s?
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

15
views
digitallogic
combinationalcircuits
0
votes
0
answers
21
Morris Mano Edition 3 Exercise 5 Question 20 (Page No. 199)
Design a 4input priority encoder with inputs as given in the tables, but with the input $D _0$ having the highest priority and the input $D _3$ have the lowest priority .
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

10
views
digitallogic
combinationalcircuits
0
votes
0
answers
22
Morris Mano Edition 3 Exercise 5 Question 19 (Page No. 199)
Rearrange the truth table for the circuit in the figure and verify it can function as demultiplexerr.
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

20
views
digitallogic
combinationalcircuits
+1
vote
0
answers
23
Morris Mano Edition 3 Exercise 5 Question 18 (Page No. 199)
Construct a $5 \times 32 $ decoder with four $3\times8$ decoders with enable and one $ 2 \times 4$ decoder. use a block diagram also.
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

33
views
digitallogic
combinationalcircuits
decoder
0
votes
0
answers
24
Morris Mano Edition 3 Exercise 5 Question 17 (Page No. 199)
Draw the logic diagram of a 2to4 line decoder with only NOR gates. Include an Enable input.
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

12
views
digitallogic
combinationalcircuits
decoder
0
votes
0
answers
25
Morris Mano Edition 3 Exercise 5 Question 16 (Page No. 199)
A combinational circuit is specified by the following three boolean functions. implement the circuit with $3 \times 8$ decoder constructed with NAND gates and three external NAND or AND gates. Use a block diagram for the decoder. Minimize the number of input in the external gates. ... $F _3(A,B,C) = \sum(0,2,3,4,7)$
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

54
views
digitallogic
combinationalcircuits
0
votes
0
answers
26
Morris Mano Edition 3 Exercise 5 Question 15 (Page No. 199)
A combinational circuit is defined by the following three boolean functions. Design a circuit with a decoder and External Gate. F1 = x’y’z’ + xz F2 = xy’z’ + x’y F3 = x’y’z + xy
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

20
views
digitallogic
combinationalcircuits
0
votes
0
answers
27
Morris Mano Edition 3 Exercise 5 Question 14 (Page No. 199)
Design a BCD to Decimal decoder using the unused combinations of the BCD code as don’t care conditions.
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

17
views
digitallogic
combinationalcircuits
0
votes
0
answers
28
Morris Mano Edition 3 Exercise 5 Question 13 (Page No. 199)
Design a combinational circuit that compares two 4bit numbers A and B to check if they are equal. the Circuit has one output x, so that when x = 1 if A = B and x = 0 if A and B is not equal.
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

9
views
digitallogic
combinationalcircuits
0
votes
0
answers
29
Morris Mano Edition 3 Exercise 5 Question 12 (Page No. 199)
It is necessary to design a decimal Adder for two digits represented in Excess3 code. Show that the correction after adding the two digits with a fourbit binary adder is as follows. The output carry is equal to the carry from ... output carry is 0 then add 1101. construct a fourbit decimal adder using two 4bit adders and an inverter..
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

66
views
digitallogic
combinationalcircuits
adder
0
votes
0
answers
30
Morris Mano Edition 3 Exercise 5 Question 11 (Page No. 198)
Construct a 4digit BCD addersubtractor using 4 BCD adders. Use the Block diagram for each component, showing only inputs and outputs.
asked
Apr 3, 2019
in
Digital Logic
by
ajaysoni1924
Boss
(
10.8k
points)

21
views
digitallogic
combinationalcircuits
adder
Page:
1
2
3
next »
Quick search syntax
tags
tag:apple
author
user:martin
title
title:apple
content
content:apple
exclude
tag:apple
force match
+apple
views
views:100
score
score:10
answers
answers:2
is accepted
isaccepted:true
is closed
isclosed:true
Recent Posts
ISRO CSE 2020 PAPER ANALYSE
BARC OCES/DGFS 2020
ISI CMI PDF by GATE Overflow
Calculus Important Points
Management Trainee Recruitment COAL INDIA 2020
Follow @csegate
Recent questions tagged combinationalcircuits
Recent Blog Comments
100 percent
I am getting 151 marks excluding question not...
everyone will be surprised seeing the cutoff this...
There is no point of any debate/discourse here....
absolutely right
50,737
questions
57,286
answers
198,196
comments
104,874
users