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Recent questions tagged digitalcircuits
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Logic Gates and switching circuits
The gates G1 & G2 in the figure have propagation delays of 10ns and 20ns respectively. If the input Vi makes an abrupt change from logic 0 to 1 at time t=t0 , then what's the output waveform V0 is ? Also please explain how to handle such kinds of questions of waveform?
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Jun 14
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Digital Logic
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Gitika Babbar
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2
Minimization doubt in DIGITAL LOGIC
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Jun 14
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Digital Logic
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Gitika Babbar
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3
Morris Mano Edition 3 Exercise 9 Question 2 (Page No. 392)
Derive a transition table for the asynchronous sequential circuit given in the figure. Determine the sequence of the internal states $y _1Y _2$ for the following sequence of the input $x _1x _2$: 00,10,11,01,11,10,00.
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Apr 7
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Digital Logic
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ajaysoni1924
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4
Morris Mano Edition 3 Exercise 7 Question 30 (Page No. 305)
Show the circuit and the timing diagram for generating six repeated timing signals, $T _0$ through $T _5$.
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Apr 6
in
Digital Logic
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ajaysoni1924
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5
Morris Mano Edition 3 Exercise 5 Question 4 (Page No. 197)
The addersubtractor circuit of figure has the following values for mode input M and data inputs A and B. In each case, determine the values of the outputs: $S _ 4 S _3 S _2 S _1$ and $C _5$. M A B 0 0111 0110 0 1000 1001 1 0101 1000 1 0000 1010
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Apr 3
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Digital Logic
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ajaysoni1924
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6
Morris Mano Edition 3 Exercise 5 Question 3 (Page No. 197)
The addersubtractor of the figure is used to subtract the following unsigned 4bit number: 0110 – 1001(6 – 9) What are the binary values in the nine inputs of the circuit $?$ what are the binary values of the five outputs of the circuit$?$ Explain How the output is related to the operation of 6 – 9.
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Apr 3
in
Digital Logic
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ajaysoni1924
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7
Morris Mano Edition 3 Exercise 5 Question 2 (Page No. 197)
Construct a BCDtoExcess3code converter with a 4bit adder.remember that the Excess3 code digits obtained by adding 3 to the corresponding BCD Digit. what must be done to change the circuit to an excess3toBCDcode converter
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Apr 3
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Digital Logic
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ajaysoni1924
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8
Morris Mano Edition 3 Exercise 4 Question 28 (Page No. 151)
Design a combinational Circuit that converts a 4bit gray code number to a 4bit straight binary number. Implement the circuit with Exclusive OR gates.
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Apr 2
in
Digital Logic
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ajaysoni1924
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9
Morris Mano Edition 3 Exercise 4 Question 29 (Page No. 151)
Design a circuit of a threebit parity generator and the circuit of the fourbit parity checker using an odd parity bit.
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Apr 2
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Digital Logic
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10
Morris Mano Edition 3 Exercise 4 Question 30 (Page No. 151)
Manipulate the following Boolean Expression in such a way so that it can be implemented using exclusiveOR and AND gates only. $AB’CD’ + A’BCD’ + AB’C’D + A’BC’D$
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Apr 2
in
Digital Logic
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ajaysoni1924
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11
Morris Mano Edition 3 Exercise 4 Question 20 (Page No. 151)
Convert the logic diagram of the code converter shown in the figure to a multilevel NAND gate Circuits
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Apr 2
in
Digital Logic
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ajaysoni1924
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12
Morris Mano Edition 3 Exercise 4 Question 19 (Page No. 151)
Draw the NAND Gate Logic Diagram for each of the following Expressions using multilevel NAND gate Circuits. (AB’ + CD’)E + BC(A + B) w(x + y + z) + xyz
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Apr 2
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Digital Logic
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13
Morris Mano Edition 3 Exercise 4 Question 16 (Page No. 150)
A BCD to seven segment decoder is a combinational circuit that converts a decimal digit in BCD to an appropriate code for the selection of the segments in the display indicator used for displaying the decimal digit in the ... decoder using the minimum number of the NAND gates. the Six invalid combinations should result in a blank display.
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Apr 2
in
Digital Logic
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ajaysoni1924
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digitallogic
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14
Morris Mano Edition 3 Exercise 4 Question 15 (Page No. 150)
Design a combinational Circuit that converts a binary number of 4bits to decimal number in BCD. Note that the BCD number is the same as the binary number as long as the digit is 9 or less than 9. binary numbers from 1010 to 1111 converts into BCD numbers from 1 0000 to 1 0101.
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Apr 2
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Digital Logic
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digitallogic
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15
Morris Mano Edition 3 Exercise 4 Question 14 (Page No. 150)
Design a combinational Circuit that can convert a decimal digit from the 2 4 2 1 code to the 8 4 2 1.
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Apr 2
in
Digital Logic
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ajaysoni1924
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16
Morris Mano Edition 3 Exercise 4 Question 13 (Page No. 149)
Design a code converter that converts a decimal digit from 8 4 2 1 code to BCD.
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Apr 2
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Digital Logic
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17
Morris Mano Edition 3 Exercise 4 Question 12 (Page No. 149)
Design a combinational circuit that detects an error in the representation of a decimal digit in BCD. The output of the circuit must be equal to logic 1 when the input contains any one of the six unused bit combinations in the BCD code.
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Apr 2
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Digital Logic
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18
Morris Mano Edition 3 Exercise 4 Question 11 (Page No. 149)
Design a combinational Circuit with the four inputs and four outputs.The output generates the 2’s complement of the input number.
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Apr 2
in
Digital Logic
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19
Morris Mano Edition 3 Exercise 4 Question 10 (Page No. 149)
Design a combinational Circuit with four inputs that represent a decimal digit in BCD and the four outputs that Produce the 9’s complement of the input digit. Six unused combinations can be treated as Don’t care conditions.
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Apr 2
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Digital Logic
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digitallogic
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20
Morris Mano Edition 3 Exercise 4 Question 7 (Page No. 149)
Design a combinational Circuit with four inputs that represent a decimal digit in BCD and the four outputs that Produce the 9’s complement of the input digit. Six unused combinations can be treated as Don’t care conditions.
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Apr 2
in
Digital Logic
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21
Morris Mano Edition 3 Exercise 4 Question 9 (Page No. 149)
Design a combinational circuit with three inputs and six outputs. The output binary number should be the square of the input binary numbers.
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Apr 2
in
Digital Logic
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ajaysoni1924
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22
Morris Mano Edition 3 Exercise 4 Question 8 (Page No. 149)
Show that a Fullsubtractor can be constructed with two halfsubtractor and an OR gate.
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Apr 2
in
Digital Logic
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ajaysoni1924
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23
Morris Mano Edition 3 Exercise 4 Question 7 (Page No. 149)
Design a combinational Circuit that multiplies twobit numbers $a _1a _0$ and $b _1b _0$, to produce a fourbit product, $c _3c _2c _1c _0$. Use AND gates and Half Adders
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Apr 2
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Digital Logic
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24
Morris Mano Edition 3 Exercise 4 Question 6 (Page No. 149)
A combination circuit produces the binary sum of two bits numbers, $x _1x _0$ and $y _1 y _0$. the outputs are C, $S _1 $ and $S _0$. Design a combinational Circuit of problem using two full adders.
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Apr 2
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Digital Logic
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25
Morris Mano Edition 3 Exercise 4 Question 5 (Page No. 149)
A combinational circuit produces the binary sum of 2bit numbers, $x _1x _0 and y _1y _0$. the outputs are C. s1. and s0. Provide the truth table of the combinational circuit
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Apr 2
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Digital Logic
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26
Morris Mano Edition 3 Exercise 4 Question 4 (Page No. 149)
Design a combinational circuit that adds 1 to a 4bit binary number, $ A _3A _2A _1A _0$. For example, if the input of the circuit is, $ A _3A _2A _1A _0$ = 1101, the output is 1110, The circuit can be designed using 4 Half Adder.
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Apr 2
in
Digital Logic
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ajaysoni1924
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27
Morris Mano Edition 3 Exercise 4 Question 3 (Page No. 149)
A majority function is generated in the combinational circuit when the output is equal to 1. the input variable has more than 1’s than 0’s. The output is zero otherwise. Design a three input majority function.
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Apr 2
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Digital Logic
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ajaysoni1924
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28
Morris Mano Edition 3 Exercise 4 Question 2 (Page No. 113)
Design a combinational Circuit with three inputs x, y, and z, and the three outputs A, B, and C. When the binary input is 0,1,2 or 3. the binary output is one greater than the input. When binary input is 4, 5, 6 or 7, the binary output is one less than the input.
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Apr 2
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Digital Logic
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digitallogic
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29
Morris Mano Edition 3 Exercise 4 Question 1 (Page No. 113)
Design a combination circuit with three inputs one output. the output is equal to logic1 when the binary value of the input is less than 3. The output is logic0 otherwise.
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Apr 2
in
Digital Logic
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30
Morris Mano Edition 3 Exercise 3 Question 20 (Page No. 112)
Implement the function F with the Following two level Forms: NANDAND, ANDNOR, ORNAND, AND NOROR. F(A,B,C,D) = $\sum(0,1,2,3,4,8,9,12)$
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Apr 2
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Digital Logic
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