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Recent questions tagged digital-counter

6 votes
2 answers
151
ISRO2007-34
Ring counter is analogous to Toggle Switch Latch Stepping Switch S-R flip flop
Ring counter is analogous toToggle SwitchLatchStepping SwitchS-R flip flop
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113 votes
20 answers
152
GATE CSE 2016 Set 1 | Question: 8
We want to design a synchronous counter that counts the sequence $0-1-0-2-0-3$ and then repeats. The minimum number of $\text{J-K}$ flip-flops required to implement this counter is _____________.
We want to design a synchronous counter that counts the sequence $0-1-0-2-0-3$ and then repeats. The minimum number of $\text{J-K}$ flip-flops required to implement this ...
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0 votes
2 answers
154
Modulus of counter1.1
Please Explain the inverted clock. How is the first Flip flop getting the Clock input? What Cr(complement) means? And how to judge MSB LSB
Please Explain the inverted clock. How is the first Flip flop getting the Clock input?What Cr(complement) means?And how to judge MSB LSB
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0 votes
1 answer
155
T flipflop counters
What will be the value of G1 and G2 how to calculate them?
What will be the value of G1 and G2 how to calculate them?
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0 votes
1 answer
156
MadeEasy Test Series: Digital Logic - Digital Counter
In figure, initially Q = A = B = 0. After three clock triggers, the states of Q, A and B will be respectively is ___________.
In figure, initially Q = A = B = 0. After three clock triggers, the states of Q, A and B will be respectively is ___________.
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1 votes
1 answer
157
MadeEasy Test Series: Digital Logic - Digital Counter
The number of Clock pulses needed to change the contents of an 8-bit-up-counter from (10101011) to (00111010) is ______________
The number of Clock pulses needed to change the contents of an 8-bit-up-counter from (10101011) to (00111010) is ______________
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2 votes
1 answer
158
MadeEasy Test Series: Digital Logic - Digital Counter
A binary counter is being pulsed by a 256 KHz clock signal.The output frequency from the MSB flip-flop is 2 KHz. The MOD number is _______ .
A binary counter is being pulsed by a 256 KHz clock signal.The output frequency from the MSB flip-flop is 2 KHz. The MOD number is _______ .
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1 votes
2 answers
159
counter
The initial state of a MOD 16 down counter is 0110 . After 37 clock pulses, the state of the counter will be 0001 1011 1101 1010
The initial state of a MOD 16 down counter is 0110 . After 37 clock pulses, the state of the counter will be0001101111011010
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12 votes
3 answers
161
ISRO2015-4
A modulus -$12$ ring counter requires a minimum of $10$ flip-flops $12$ flip-flops $8$ flip-flops $6$ flip-flops
A modulus -$12$ ring counter requires a minimum of$10$ flip-flops$12$ flip-flops$8$ flip-flops$6$ flip-flops
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0 votes
2 answers
163
If the initial stage of mod-11 counter is 0110, then what will be the counting sequence for next 24 clock pulses?
If the initial stage of mod-11 counter is 0110, then what will be the counting sequence for next 24 clock pulses?What will be counting sequence for the next 17 clock puls...
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24 votes
4 answers
164
GATE1992-04-c
Design a $3$-bit counter using D-flip flops such that not more than one flip-flop changes state between any two consecutive states.
Design a $3$-bit counter using D-flip flops such that not more than one flip-flop changes state between any two consecutive states.
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52 votes
7 answers
167
GATE CSE 2015 Set 1 | Question: 20
Consider a $4$-bit Johnson counter with an initial value of $0000.$ The counting sequence of this counter is $0, 1, 3, 7, 15, 14, 12, 8, 0$ $0, 1, 3, 5, 7, 9, 11, 13, 15, 0$ $0, 2, 4, 6, 8, 10, 12, 14, 0$ $0, 8, 12, 14, 15, 7, 3, 1, 0$
Consider a $4$-bit Johnson counter with an initial value of $0000.$ The counting sequence of this counter is $0, 1, 3, 7, 15, 14, 12, 8, 0$$0, 1, 3, 5, 7, 9, 11, 13, 15, ...
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79 votes
8 answers
168
GATE CSE 2015 Set 2 | Question: 7
The minimum number of $\text{JK}$ flip-flops required to construct a synchronous counter with the count sequence $(0, 0, 1, 1, 2, 2, 3, 3, 0, 0, \ldots)$ is _______.
The minimum number of $\text{JK}$ flip-flops required to construct a synchronous counter with the count sequence $(0, 0, 1, 1, 2, 2, 3, 3, 0, 0, \ldots)$ is _______.
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28 votes
3 answers
169
GATE IT 2005 | Question: 11
How many pulses are needed to change the contents of a $8$-bit up counter from $10101100$ to $00100111$ (rightmost bit is the LSB)? $134$ $133$ $124$ $123$
How many pulses are needed to change the contents of a $8$-bit up counter from $10101100$ to $00100111$ (rightmost bit is the LSB)?$134$$133$$124$$123$
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25 votes
2 answers
171
GATE CSE 1994 | Question: 11
Find the contents of the flip-flop $Q_2, Q_1$ and $Q_0$ in the circuit of figure, after giving four clock pulses to the clock terminal. Assume $Q_2Q_1Q_0=000$ initially.
Find the contents of the flip-flop $Q_2, Q_1$ and $Q_0$ in the circuit of figure, after giving four clock pulses to the clock terminal. Assume $Q_2Q_1Q_0=000$ initially.
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19 votes
1 answer
172
GATE CSE 1994 | Question: 2-1
The number of flip-flops required to construct a binary modulo $N$ counter is __________
The number of flip-flops required to construct a binary modulo $N$ counter is __________
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27 votes
6 answers
173
GATE CSE 2011 | Question: 15
The minimum number of $\text{D}$ flip-flops needed to design a mod-258 counter is 9 8 512 258
The minimum number of $\text{D}$ flip-flops needed to design a mod-258 counter is98512258
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