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Recent questions tagged digitallogic
Webpage for Digital Logic:
0
votes
1
answer
1
Adder
One ripple carry adder is adding two nbit integers. The time complexity to perform addition using this adder is (We know carry look ahead adder takes time log n. Is it similar for other adders too). Plz also share some good resource about these two adders
asked
3 hours
ago
in
Digital Logic
by
srestha
Veteran
(
83.8k
points)

11
views
digitallogic
carrygenerator
adder
0
votes
0
answers
2
Overflow
1)Why 1's complement number cannot represent an overflow? 2)Is signed bit need to detect overflow? 3)Is Sum bit (not carry bit) participate to detect overflow?
asked
23 hours
ago
in
Digital Logic
by
srestha
Veteran
(
83.8k
points)

21
views
digitallogic
0
votes
0
answers
3
ISI CSB 2017
C5. (a) Consider a simple code in which each codeword consists of 2 data bits [d1, d0] and 3 check bits [c2, c1, c0]. The check bits are computed as follows: c2 = d1 ⊕ d0, where ⊕ is the modulo2 sum c1 = d1, and c0 = d0. (i) ... a codeword can be detected by this code? Justify your answer. (iii) How many errors in a codeword can be corrected by this code? Justify your answer.
asked
May 11
in
Digital Logic
by
Anwesha Kashyap
(
7
points)

34
views
isi
digitallogic
0
votes
1
answer
4
Why only Three Basic Logic Gates are there? can anyone explain the logic behind three basic Gate?
asked
May 10
in
Digital Logic
by
krishn.jh
(
239
points)

34
views
digitallogic
0
votes
0
answers
5
Doubt
Why self dual functions are required?
asked
May 10
in
Digital Logic
by
Angkit
Active
(
3.7k
points)

33
views
digitallogic
0
votes
0
answers
6
Morris Manochapter 5. Programmable Logic Array
asked
May 9
in
Digital Logic
by
Harsh Kumar
(
33
points)

28
views
digitallogic
morrismano
0
votes
1
answer
7
logic gates
The inverter OR gate and AND gate are called decisionmaking elements because they can recognize some input _____ while disregarding others. A gate recognizes a word when its output is _____ (a) words, high (b) bytes, low (c) bytes, high (d) character, low
asked
May 4
in
Digital Logic
by
sumit_kumar
(
279
points)

40
views
digitallogic
0
votes
0
answers
8
Not Gate
We know in case of And we take intersection of Minterms and in case of OR we take union of the minterms what about in case of Not gate. Is it like : Say F(A,B,C) = (0,1,2,4,6) then not F = (3,5,7) is it right ?
asked
May 3
in
Digital Logic
by
Na462
Active
(
2.3k
points)

35
views
digitallogic
+1
vote
1
answer
9
Morris Mano (5th edition) Exercise 3.18
Draw a logic diagram using only twoinput NOR gates to implement the following function: $F(A,B,C,D)$ = $\left (A \oplus B \right )^{'} \left ( C \oplus D \right )$
asked
Apr 24
in
Digital Logic
by
Mk Utkarsh
Boss
(
12.3k
points)

70
views
digitallogic
0
votes
4
answers
10
ISRO20183
If a variable can take only integral values from $0$ to $n$, where $n$ is an integer, then the variable can be represented as a bitfield whose width is ( the log in the answer are to the base $2$, and $\left [ \log_{n} \right ]$) means the floor of $\log_{n}$) $\left [ ... $1$ $bits$ $\left [ \log (n1) \right ]$ + $1$ $bits$ $\left [ \log (n+1) \right ]$ + $1$ $bits$ None of the above
asked
Apr 22
in
Digital Logic
by
Arjun
Veteran
(
342k
points)

1.1k
views
isro2018
numberrepresentation
digitallogic
0
votes
1
answer
11
ISRO20187
A computer uses ternary system instead of the traditional binary system. An n bit binary string in the binary system will occupy A) $3+n$ ternary digits B)$\frac{2n}{3}$ ternary digits C)$n\left ( \log _{2}3 \right )$ ternary digits D)$n\left ( \log _{3}2 \right )$ ternary digits
asked
Apr 22
in
Digital Logic
by
srestha
Veteran
(
83.8k
points)

324
views
isro2018
digitallogic
+1
vote
0
answers
12
digital logic
Can a 4:1 MUX operate as 2:1? (I understand 4:1 can be realized using 2:1 Mux but is reverse possible, may be by grounding?)
asked
Apr 19
in
Digital Logic
by
Warlock lord
Active
(
3.4k
points)

55
views
digitallogic
digitalcircuits
+1
vote
3
answers
13
Functionally Complete
Suppose a function F(A,B) = A' + B then to prove it functionally complete.Can we do it like: F(A,A') = A' > Complementation derived F(A',B) = A + B > OR Operation Derived So we could conclude that its functionally Complete. Is it the right way if not Please tell the right eay to prove the Function to be Functionally Complete. Thank You in advance
asked
Apr 18
in
Digital Logic
by
Na462
Active
(
2.3k
points)

58
views
functionalcompleteness
digitallogic
0
votes
0
answers
14
Synchronous vs Asynchronous Circuit
How to identify the Given circuit to be a Synchronous and Asynchronous Circuits ? In synchronous ckt the flip flop connected are triggered by a common clock pulse, but in asynchronous the output of one triggers the succeeding Flip Flop Am i ... to every flip flop then its considered to be asynchronous right ? And please explain the various ways to identify ?
asked
Apr 17
in
Digital Logic
by
Na462
Active
(
2.3k
points)

26
views
digitallogic
+1
vote
1
answer
15
Booth Algorithm
Can anybody Explain why is it so that "The worst case of an implementation using Booth’s algorithm is when pairs of 01s or 10s occur very frequently in the multiplier." ?
asked
Apr 17
in
Digital Logic
by
Na462
Active
(
2.3k
points)

38
views
boothsalgorithm
digitallogic
0
votes
0
answers
16
Kmap doubt
For converting or Using Kmap the expression needs to be in SOP form but in this Question : https://gateoverflow.in/8162/gate2015237. In best chosen answer he didnt convert the expression in SOP and did it directly what is this Method can anybody explain please ?
asked
Apr 17
in
Digital Logic
by
Na462
Active
(
2.3k
points)

41
views
digitallogic
kmap
0
votes
1
answer
17
Digital Logic
I know the Concept of Binary ripple carry adder but i don't understand about the delay.I know that the output wont be generated until carry is propagated.So how to find The actual delay which will be there and how to determine which input will take ... ? I cant solve the Questions involving the calculations on finding Delay.Can anybody explain how to do it using an Example ? Please
asked
Apr 16
in
Digital Logic
by
Na462
Active
(
2.3k
points)

29
views
digitallogic
+1
vote
2
answers
18
Logic Gates
If (A exnor B) = C, then (A exnor B exnor C) = ?
asked
Apr 7
in
Digital Logic
by
an0nh4x0r
(
17
points)

67
views
digitallogic
+1
vote
0
answers
19
Number System Interconversion
Can all the values in decimal be finitely represented in binary, hexadecimal and octal system and vice versa? I know 0.2 cannot be converted to the binary form which has a finite representation. Any other such number which cannot be converted from one of the number systems to other?
asked
Apr 5
in
Digital Logic
by
smsubham
Loyal
(
6k
points)

49
views
numberrepresentation
digitallogic
0
votes
1
answer
20
Self Doubt
if we have $n$ consecutive $1s$ in binary then its magnitude is $2^n 1$ similarly ,do we have any short cut like ,if we have $n$ consecutive $1s$ after a decimal point then the magnitude will be $12^n$ ?
asked
Mar 25
in
Digital Logic
by
HHH777
(
31
points)

76
views
easy
digitallogic
numberrepresentation
0
votes
1
answer
21
Self Doubt
Q1. Find 1's and 2's complement of decimal number of 15 Q2. Find 1's and 2's complement of decimal number of 15 Answer with Explanation will be welcomed. :)
asked
Mar 25
in
Digital Logic
by
Subham Nagar
(
497
points)

63
views
digitallogic
+1
vote
2
answers
22
Don't Care term in POS
Should we use Don't care terms while calculating POS expression?
asked
Mar 21
in
Digital Logic
by
Jason
Active
(
1.4k
points)

78
views
digitallogic
canonicalnormalform
kmap
0
votes
0
answers
23
# doubt digital
Why carry and borrow are complement in unsigned number????? Please explain clearly
asked
Mar 20
in
Digital Logic
by
Sankha Narayan Bose
(
157
points)

50
views
digitallogic
gate
digitalcircuits
gate2018
0
votes
0
answers
24
ISI CSB 2017
Consider the Boolean function $F(x_1,x_2,......,x_{10})$ realised by the following combinational circuit. $\text{Determine the number of input combinations for which the output function F realised by }$ $\text{ the circuit becomes true (logic 1)}$ I'm getting $940$ Input combinations
asked
Mar 20
in
Digital Logic
by
shivanisrivarshini
Boss
(
14.1k
points)

71
views
isi
digitallogic
0
votes
3
answers
25
Digital Logic
Convert $1100101110011011$ in binary to hexadecimal
asked
Mar 1
in
Digital Logic
by
Kalu30
(
15
points)

80
views
digitallogic
+1
vote
0
answers
26
Practice Book
Minimum size of ROM required to implement following set of boolean equations is : $F1(w,x,y,z)=\sum m(0,1,2,5,7,12,13,15)$ $F2(w,x,y,z)=\sum m(0,5,6,9,13,15)$ $F3(w,x,y,z)=\sum m(6,7,9,12,14,15)$ $16\times4$ $16\times3$ $16\times8$ $16\times12$
asked
Feb 24
in
Digital Logic
by
RahulRoy31
(
199
points)

82
views
digitallogic
+2
votes
2
answers
27
GATE 2018 Digital Logic  9( Electronics and Communication Engineering )
asked
Feb 21
in
Digital Logic
by
Lakshman Patel RJIT
Loyal
(
7.6k
points)

178
views
gate2018
digitallogic
booleanalgebra
normal
0
votes
1
answer
28
Flipflops for sequence
Design a counter with the following repeated binary sequence: 0, 4, 2, 1, 6. Use T flip flops.
asked
Feb 16
in
Digital Logic
by
Meme Iamam
(
123
points)

103
views
digitallogic
+7
votes
4
answers
29
GATE201849
Consider the minterm list form of a Boolean function $F$ given below. $$F(P, Q, R, S) = \Sigma m(0, 2, 5, 7, 9, 11) + d(3, 8, 10, 12, 14)$$ Here, $m$ denotes a minterm and $d$ denotes a don't care term. The number of essential prime implicants od hte function $F$ is ___
asked
Feb 14
in
Digital Logic
by
gatecse
Boss
(
18k
points)

1.6k
views
gate2018
digitallogic
minsumofproductsform
numericalanswers
+6
votes
4
answers
30
GATE201833
Consider the unsigned 8bit fixed point binary number representation, below, $$b_7 \: \: b_6 \: \: b_5 \: \: b_4 \: \: b_3 \: \: \cdot b_2 \: \: b_1 \: \: b_0$$ where the position of the primary point is between $b_3$ ... can be exactly represented Only $ii$ cannot be exactly represented Only $iii$ and $iv$ cannot be exactly represented Only $i$ and $ii$ cannot be exactly represented
asked
Feb 14
in
Digital Logic
by
gatecse
Boss
(
18k
points)

1.3k
views
usergate2018
usermod
digitallogic
numberrepresentation
floatingpointrepresentation
normal
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