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Webpage for Digital Logic:
Recent questions tagged digital-logic
0
votes
1
answer
1141
General Topic Doubt Digital Logic: Min No Gates
Consider a $3-bit$ number $A$ and $2 bit$ number $B$ are given to a multiplier. The output of multiplier is realized using $AND$ gate and one-bit full adders. If the minimum number of $AND$ gates required are $X$ and one-bit full adders required are Y, then $X+Y = $ _______
Consider a $3-bit$ number $A$ and $2 bit$ number $B$ are given to a multiplier. The output of multiplier is realized using $AND$ gate and one-bit full adders. If the mini...
saumya mishra
1.9k
views
saumya mishra
asked
May 31, 2018
Digital Logic
digital-logic
digital-circuits
general-topic-doubt
combinational-circuit
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–
2
votes
3
answers
1142
minimization
Let $‘1’$ and $‘0’$ denote the binary constants. Consider the following Boolean expression for $F$ over two variables $P$ and $Q$: $F(P, Q) = ( ( 1 \oplus P) \oplus (P \oplus Q) ) \oplus ( (P \oplus Q) \oplus (Q \oplus 0) ) $ The equivalent expression for $F$ is
Let $‘1’$ and $‘0’$ denote the binary constants. Consider the following Boolean expression for $F$ over two variables $P$ and $Q$:$F(P, Q) = ( ( 1 \oplus P) \oplu...
suneetha
581
views
suneetha
asked
May 30, 2018
Digital Logic
digital-logic
boolean-algebra
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–
0
votes
1
answer
1143
digital logic
can we implement a function of $3$ variable in pos using a decoder of $2 \times 4$ and multiplexer $2 \times 1$??
can we implement a function of $3$ variable in pos using a decoder of $2 \times 4$ and multiplexer $2 \times 1$??
Kunnu Mishra 1
279
views
Kunnu Mishra 1
asked
May 29, 2018
Digital Logic
digital-logic
+
–
0
votes
1
answer
1144
digital logic,combinational circuit
in Decoders can we implement functions in POS?
in Decoders can we implement functions in POS?
Kunnu Mishra 1
923
views
Kunnu Mishra 1
asked
May 29, 2018
Digital Logic
digital-logic
decoder
pos
+
–
4
votes
1
answer
1145
Number system
Q. Find $r_1$ and $r_2$ without using quadratic equation. $(235)_{r_1}= (565)_{10}=(1065)_{r_2}$ a) $r_1=16$ & $r_2=8$ b) $r_1=10$ & $r_2=16$
Q. Find $r_1$ and $r_2$ without using quadratic equation. $(235)_{r_1}= (565)_{10}=(1065)_{r_2}$a) $r_1=16$ & $r_2=8$b) $r_1=10$ & $r_2=16$
Mr khan 3
2.5k
views
Mr khan 3
asked
May 29, 2018
Digital Logic
digital-logic
number-system
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–
0
votes
1
answer
1146
gate 2004
A $4 \hspace{0.1cm} bit$ carry lookahead adder which add two $4$ $bit$ number is designed using $AND ,OR,NOT,NAND,NOR$ gates only.Assuming that all the inputs are available in both complemented and uncomplemented form and the delay of each gate is one time ... is if we take same $4$ $bit$ number instead of lookahead adder if we take parallel adder what will be overall propagation delay??
A $4 \hspace{0.1cm} bit$ carry lookahead adder which add two $4$ $bit$ number is designed using $AND ,OR,NOT,NAND,NOR$ gates only.Assuming that all the inputs are availab...
BASANT KUMAR
964
views
BASANT KUMAR
asked
May 27, 2018
Digital Logic
digital-logic
adder
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–
1
votes
2
answers
1147
K MAP
what will be the k Map for- $(P+Q'+R').(P+Q'+R).(P+Q+R')$ and the simplified SOP (Sum of Product) for the above the Boolean expression? Please try to make a k map in this format-
what will be the k Map for-$(P+Q'+R').(P+Q'+R).(P+Q+R')$and the simplified SOP (Sum of Product) for the above the Boolean expression?Please try to make a k map in this fo...
iarnav
599
views
iarnav
asked
May 25, 2018
Digital Logic
digital-logic
k-map
digital-circuits
+
–
1
votes
3
answers
1148
k map
Consider the Karnaugh map given below, where X represents "don't care" and blank represents 0. what will be the SOP?
Consider the Karnaugh map given below, where X represents "don't care" and blank represents 0. what will be the SOP?
iarnav
858
views
iarnav
asked
May 25, 2018
Digital Logic
digital-logic
k-map
digital-circuits
+
–
1
votes
2
answers
1149
k map minimization digital logic
What is the minimal $Sum-Of-Products$ of the map? ($X$ is a don't care)
What is the minimal $Sum-Of-Products$ of the map? ($X$ is a don't care)
iarnav
967
views
iarnav
asked
May 25, 2018
Digital Logic
digital-logic
k-map
digital-circuits
+
–
0
votes
4
answers
1150
Gradeup question doubt
$x(x+x'y)z(x+y+z)$ simplifies to (A)$x+x'y$ (B)$x+y+z$ (C)$xyz$ (D)$xz$ Answer is (D) But I can not obtain $xz$ only. My solutions is as follows: x(x+x'y)z(x+y+z) =(x+y)(xz+yz+z) =xz+xyz+xz+xyz+yz+yz =xz+yz+xyz =xz(1+y)+yz =xz+yz Can anyone tell where I made mistake?
$x(x+x'y)z(x+y+z)$ simplifies to(A)$x+x'y$(B)$x+y+z$(C)$xyz$(D)$xz$Answer is (D)But I can not obtain $xz$ only.My solutions is as follows:x(x+x'y)z(x+y+z)=(x+y)(xz+yz+z)=...
Dhoomketu
597
views
Dhoomketu
asked
May 25, 2018
Digital Logic
digital-logic
boolean-algebra
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–
0
votes
2
answers
1151
CIRCUIT OUTUT
I/P TO NAND GATE IS - A,B I/P TO NOT GATE IS - C WHAT WIL BE THE O/P - F?
I/P TO NAND GATE IS - A,B I/P TO NOT GATE IS - C WHAT WIL BE THE O/P - F?
iarnav
303
views
iarnav
asked
May 24, 2018
Digital Logic
digital-logic
digital-circuits
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–
0
votes
3
answers
1152
digital circuit output
$\text{what is the o/p of this circuit ?}$
$\text{what is the o/p of this circuit ?}$
iarnav
494
views
iarnav
asked
May 24, 2018
Digital Logic
digital-logic
digital-circuits
+
–
0
votes
0
answers
1153
DEMUX
Suppose a $2$ to $2^{n}$ DEMUX got an input from a n bit Ring counter. The output of the DMUX can be a)a up counter b)a down counter c)a counter
Suppose a $2$ to $2^{n}$ DEMUX got an input from a n bit Ring counter. The output of the DMUX can bea)a up counterb)a down counterc)a counter
srestha
791
views
srestha
asked
May 22, 2018
Digital Logic
digital-logic
demux
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–
0
votes
1
answer
1154
Registers
How it is gray code conversion?....!!! i think output should be 00000000
How it is gray code conversion?....!!!i think output should be 00000000
ajaysoni1924
851
views
ajaysoni1924
asked
May 22, 2018
Digital Logic
register
digital-logic
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–
0
votes
1
answer
1155
Counter
Answer given is 4 but mine is 2
Answer given is 4 but mine is 2
ajaysoni1924
422
views
ajaysoni1924
asked
May 22, 2018
Digital Logic
digital-logic
digital-counter
flip-flop
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–
0
votes
1
answer
1156
Flipflop
Answer is TQ'+T'[Q(s+r')+sr']
Answer is TQ'+T'[Q(s+r')+sr']
ajaysoni1924
1.5k
views
ajaysoni1924
asked
May 22, 2018
Digital Logic
digital-logic
flip-flop
+
–
0
votes
1
answer
1157
Adder
One ripple carry adder is adding two n-bit integers. The time complexity to perform addition using this adder is (We know carry look ahead adder takes time log n. Is it similar for other adders too). Plz also share some good resource about these two adders
One ripple carry adder is adding two n-bit integers. The time complexity to perform addition using this adder is (We know carry look ahead adder takes time log n. Is it s...
srestha
1.3k
views
srestha
asked
May 21, 2018
Digital Logic
digital-logic
carry-generator
adder
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–
1
votes
1
answer
1158
Overflow
1)Why 1's complement number cannot represent an overflow? 2)Is signed bit need to detect overflow? 3)Is Sum bit (not carry bit) participate to detect overflow?
1)Why 1's complement number cannot represent an overflow?2)Is signed bit need to detect overflow?3)Is Sum bit (not carry bit) participate to detect overflow?
srestha
2.0k
views
srestha
asked
May 20, 2018
Digital Logic
digital-logic
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–
0
votes
0
answers
1159
ISI CSB 2017
Consider a simple code in which each codeword consists of $2$ data bits $[d1, d0]$ and $3$ check bits $[c2, c1, c0]$. The check bits are computed as follows: $c2 = d1 \oplus d0$, where $\oplus$ is the modulo - $2$ sum $c1 = d1$, and ... a codeword can be detected by this code? Justify your answer. (iii) How many errors in a codeword can be corrected by this code? Justify your answer.
Consider a simple code in which each codeword consists of $2$ data bits $[d1, d0]$ and $3$ check bits $[c2, c1, c0]$.The check bits are computed as follows:$c2 = d1 \oplu...
Anwesha Kashyap
436
views
Anwesha Kashyap
asked
May 11, 2018
Computer Networks
isi
digital-logic
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–
0
votes
1
answer
1160
Why only Three Basic Logic Gates are there? can anyone explain the logic behind three basic Gate?
Why only Three Basic Logic Gates are there? can anyone explain the logic behind three basic Gate?
Why only Three Basic Logic Gates are there? can anyone explain the logic behind three basic Gate?
krishn.jh
373
views
krishn.jh
asked
May 10, 2018
Digital Logic
digital-logic
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–
0
votes
0
answers
1161
Doubt
Why self dual functions are required?
Why self dual functions are required?
Angkit
177
views
Angkit
asked
May 10, 2018
Digital Logic
digital-logic
+
–
0
votes
0
answers
1162
Morris Mano-chapter 5. Programmable Logic Array
I just wanted to know whether I may leave the sections 5.8 (Programmable Logic Array) and section 5.9 (Programmable Array Logic) of Morris Mano book for GATE preparation. Are they important with respect to GATE ??
I just wanted to know whether I may leave the sections 5.8 (Programmable Logic Array) and section 5.9 (Programmable Array Logic) of Morris Mano book for GATE preparation....
Harsh Kumar
378
views
Harsh Kumar
asked
May 9, 2018
Digital Logic
digital-logic
morris-mano
+
–
0
votes
1
answer
1163
logic gates
The inverter OR gate and AND gate are called decision-making elements because they can recognize some input _____ while disregarding others. A gate recognizes a word when its output is _____ (a) words, high (b) bytes, low (c) bytes, high (d) character, low
The inverter OR gate and AND gate are called decision-making elements because they can recognize some input _____ while disregarding others. A gate recognizes a word when...
sumit_kumar
516
views
sumit_kumar
asked
May 4, 2018
Digital Logic
digital-logic
+
–
0
votes
0
answers
1164
Not Gate
We know in case of And we take intersection of Minterms and in case of OR we take union of the minterms what about in case of Not gate. Is it like :- Say F(A,B,C) = (0,1,2,4,6) then not F = (3,5,7) is it right ?
We know in case of And we take intersection of Minterms and in case of OR we take union of the minterms what about in case of Not gate. Is it like :-Say F(A,B,C) = (0,1,2...
Na462
272
views
Na462
asked
May 3, 2018
Digital Logic
digital-logic
+
–
1
votes
1
answer
1165
Morris Mano (5th edition) Exercise 3.18
Draw a logic diagram using only two-input NOR gates to implement the following function: $F(A,B,C,D)$ = $\left (A \oplus B \right )^{'} \left ( C \oplus D \right )$
Draw a logic diagram using only two-input NOR gates to implement the following function:$F(A,B,C,D)$ = $\left (A \oplus B \right )^{'} \left ( C \oplus D \right )$
Mk Utkarsh
1.6k
views
Mk Utkarsh
asked
Apr 24, 2018
Digital Logic
digital-logic
+
–
6
votes
4
answers
1166
ISRO2018-3
If a variable can take only integral values from $0$ to $n$, where $n$ is an integer, then the variable can be represented as a bit-field whose width is $($the log in the answer are to the base $2$, and $\left \lceil \log_{}{n} \right \rceil$ ... $\left \lceil \log (n+1) \right \rceil + 1\text{ bits}$ None of the above
If a variable can take only integral values from $0$ to $n$, where $n$ is an integer, then the variable can be represented as a bit-field whose width is $($the log in the...
Arjun
6.4k
views
Arjun
asked
Apr 22, 2018
Digital Logic
isro2018
number-representation
digital-logic
+
–
14
votes
3
answers
1167
ISRO2018-9
In the diagram above, the inverter (NOT gate) and the AND-gates labeled $1$ and $2$ have delays of $9, 10$ and $12$ nanoseconds (ns), respectively. Wire delays are negligible. For certain values $a$ and $c$, together with certain transition of $b$, a glitch (spurious output) is ... correct value. The duration of glitch is: $7\;\text{ns}$ $9\;\text{ns}$ $11\;\text{ns}$ $13\;\text{ns}$
In the diagram above, the inverter (NOT gate) and the AND-gates labeled $1$ and $2$ have delays of $9, 10$ and $12$ nanoseconds (ns), respectively. Wire delays are neglig...
Arjun
6.1k
views
Arjun
asked
Apr 22, 2018
Digital Logic
isro2018
digital-logic
circuit-output
+
–
4
votes
3
answers
1168
ISRO2018-19
Given $\sqrt{224_{r}}$= $13$_{r}$ the value of radix $r$ is $10$ $8$ $6$ $5$
Given $\sqrt{224_{r}}$= $13$$_{r}$ the value of radix $r$ is$10$$8$$6$$5$
Arjun
3.8k
views
Arjun
asked
Apr 22, 2018
Digital Logic
isro2018
number-representation
digital-logic
+
–
4
votes
3
answers
1169
ISRO2018-32
A computer uses ternary system instead of the traditional systen, An $n$ bit string in the binary system will occupy $3+n$ ternary digits $2n/3$ ternary digits $n$\log_{2}3$ ternary digits $n$\log_{3}2$ ternary digits
A computer uses ternary system instead of the traditional systen, An $n$ bit string in the binary system will occupy$3+n$ ternary digits$2n/3$ ternary digits$n$$\log_{2}3...
Arjun
4.2k
views
Arjun
asked
Apr 22, 2018
Digital Logic
isro2018
digital-logic
number-representation
+
–
4
votes
2
answers
1170
ISRO2018-62
Any set of Boolean operation that is sufficient to represent all Boolean expression is said to be complete. Which of the following is not complete ? $\text{{AND, OR}}$ $\text{{AND, NOT}}$ $\text{{NOT, OR}}$ $\text{{NOR}}$
Any set of Boolean operation that is sufficient to represent all Boolean expression is said to be complete. Which of the following is not complete ?$\text{{AND, OR}}$$\te...
Arjun
1.9k
views
Arjun
asked
Apr 22, 2018
Digital Logic
isro2018
digital-logic
boolean-algebra
+
–
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