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Webpage for Digital Logic:
Recent questions tagged digital-logic
1
votes
2
answers
1981
Which is a valid octal constant?
The valid octal constants from the following (i) 0245 (ii) 0387 (iii) 04.32 (iv) –0467 (A) (i) and (ii) (B) (iii) and (iv) (C) (i) (iii) and (iv) (D) (i) and (iv)
The valid octal constants from the following(i) 0245 (ii) 0387 (iii) 04.32 (iv) –0467(A) (i) and (ii)(B) (iii) and (iv)(C) (i) (iii) and (iv)(D) (i) and (iv)
sh!va
3.5k
views
sh!va
asked
Jul 12, 2016
Digital Logic
number-representation
digital-logic
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–
0
votes
2
answers
1982
UGC NET CSE | June 2014 | Part 3 | Question: 68
A terminal multiplexer has six $1200$ bps terminals and $'n'$ $300$ bps terminals connected to it. If the outgoing line is $9600$ bps, what is the value of $n$? $4$ $8$ $16$ $28$
A terminal multiplexer has six $1200$ bps terminals and $'n'$ $300$ bps terminals connected to it. If the outgoing line is $9600$ bps, what is the value of $n$?$4$$8$$16$...
makhdoom ghaya
6.4k
views
makhdoom ghaya
asked
Jul 12, 2016
Digital Logic
ugcnetjune2014iii
digital-logic
multiplexer
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–
4
votes
2
answers
1983
UGC NET CSE | December 2012 | Part 2 | Question: 49
Identify the operation which is commutative but not associative? OR NOR EX-OR NAND
Identify the operation which is commutative but not associative?ORNOREX-ORNAND
go_editor
10.4k
views
go_editor
asked
Jul 11, 2016
Digital Logic
ugcnetcse-dec2012-paper2
digital-logic
digital-circuits
multiple-selects
+
–
3
votes
1
answer
1984
UGC NET CSE | December 2012 | Part 2 | Question: 47
Match the following : ... $\text{a-i, b-ii, c-iii}$ $\text{a-i, b-iii, c-ii}$ $\text{a-iii, b-i, c-ii}$
Match the following :$\begin{array}{clcl} \text{a.} & \text{TTL} & \text{i.} & \text{High fan out} \\ \text{b.} & \text{ECL} & \text{ii.} & \text{Low propagation delay}...
go_editor
1.8k
views
go_editor
asked
Jul 11, 2016
Digital Logic
ugcnetcse-dec2012-paper2
digital-logic
digital-circuits
match-the-following
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–
0
votes
1
answer
1985
UGC NET CSE | December 2012 | Part 2 | Question: 38
Match the following $\textsf{IC}$ ... $\text{a-iii, b-ii, c-i}$ $\text{a-ii, b-iii, c-i}$ $\text{a-ii, b-i, c-iii}$
Match the following $\textsf{IC}$ families with their basic circuits :$\begin{array}{clcl} \text{a.} & \text{TTL} & \text{i.} & \text{NAND} \\ \text{b.} & \text{ECL} & \...
go_editor
3.0k
views
go_editor
asked
Jul 11, 2016
Digital Logic
ugcnetcse-dec2012-paper2
digital-logic
digital-circuits
+
–
4
votes
2
answers
1986
UGC NET CSE | June 2016 | Part 2 | Question: 7
The $\text{IEEE-754}$ double precision format to represent floating point numbers, has a length of ______ bits. $16$ $32$ $48$ $64$
The $\text{IEEE-754}$ double precision format to represent floating point numbers, has a length of ______ bits.$16$$32$$48$$64$
Sanjay Sharma
2.4k
views
Sanjay Sharma
asked
Jul 10, 2016
Digital Logic
ugcnetcse-june2016-paper2
digital-logic
ieee-representation
+
–
6
votes
1
answer
1987
UGC NET CSE | June 2016 | Part 2 | Question: 10
In a positive edge triggered $J$-$K$ flip flop , if $J$ and $K$ both are high then the output will be ______on the rising edge of the clock : No change Set Reset Toggle
In a positive edge triggered $J$-$K$ flip flop , if $J$ and $K$ both are high then the output will be ______on the rising edge of the clock :No changeSetResetToggle
Sanjay Sharma
4.0k
views
Sanjay Sharma
asked
Jul 10, 2016
Digital Logic
ugcnetcse-june2016-paper2
digital-logic
flip-flop
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–
1
votes
2
answers
1988
UGC NET CSE | June 2014 | Part 3 | Question: 44
Which of the following flip-flops is free from race condition ? $T$ flip-flop $SR$ flip-flop Master-slave $JK$ flip-flop None of the above
Which of the following flip-flops is free from race condition ?$T$ flip-flop$SR$ flip-flop Master-slave $JK$ flip-flop None of the above
makhdoom ghaya
2.0k
views
makhdoom ghaya
asked
Jul 10, 2016
Digital Logic
ugcnetjune2014iii
digital-logic
sequential-circuit
flip-flop
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–
0
votes
3
answers
1989
UGC NET CSE | June 2014 | Part 3 | Question: 42
The output of a sequential circuit depends on Present input only Past input only Both present and past input Past output only
The output of a sequential circuit depends onPresent input onlyPast input onlyBoth present and past inputPast output only
makhdoom ghaya
10.4k
views
makhdoom ghaya
asked
Jul 10, 2016
Digital Logic
ugcnetjune2014iii
digital-logic
sequential-circuit
+
–
1
votes
1
answer
1990
Which is false about MOV instruction?
The x86 MOV class of instructions is used to copy data from one location to another. Which of the following statements is false? Integers can be moved between memory locations. Strings can be moved between memory locations. Integers can be moved conditionally. There are several conditions governing a conditional move
The x86 MOV class of instructions is used to copy data from one location to another. Which of the following statements is false?Integers can be moved between memory locat...
sh!va
605
views
sh!va
asked
Jul 9, 2016
Digital Logic
digital-logic
+
–
2
votes
2
answers
1991
The minimum number of radix-64 digits needed to represent an unsigned 64-bit binary number is
The minimum number of radix-64 digits needed to represent an unsigned 64-bit binary number is (A) 10 (B) 11 (C) 12 (D) None of these
The minimum number of radix-64 digits needed to represent an unsigned 64-bit binary number is (A) 10(B) 11(C) 12(D) None of these
sh!va
815
views
sh!va
asked
Jul 9, 2016
Digital Logic
digital-logic
+
–
1
votes
3
answers
1992
UGC NET CSE | December 2012 | Part 2 | Question: 1
Consider the circuit shown below. IN a certain steady state, ‘Y’ is at logical ‘l’. What are the possible values of A, B, C? A=0, B=0, C=1 A=0, B=C=1 A=1, B=C=0 A= B=1, C=1
Consider the circuit shown below. IN a certain steady state, ‘Y’ is at logical ‘l’. What are the possible values of A, B, C?A=0, B=0, C=1A=0, B=C=1A=1, B=C=0A= B=...
go_editor
3.7k
views
go_editor
asked
Jul 8, 2016
Digital Logic
ugcnetcse-dec2012-paper2
digital-logic
circuit-output
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–
4
votes
2
answers
1993
UGC NET CSE | June 2012 | Part 3 | Question: 53
Consider the below circuit and find the output function f(x, y, z) $x \bar{z} + xy + \bar{y}z$ $x \bar{z} + xy + \bar{y} \bar{z}$ $xz + xy + \bar{y} \bar{z}$ $xz + x \bar{y} + \bar{y}z$
Consider the below circuit and find the output function f(x, y, z)$x \bar{z} + xy + \bar{y}z$$x \bar{z} + xy + \bar{y} \bar{z}$$xz + xy + \bar{y} \bar{z}$$xz + x \bar{y} ...
go_editor
3.9k
views
go_editor
asked
Jul 7, 2016
Digital Logic
ugcnetcse-june2012-paper3
digital-logic
multiplexer
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–
8
votes
2
answers
1994
ISRO2016-14
If $12A7C_{16} = X_8$ then the value of $X$ is $224174$ $425174$ $6173$ $225174$
If $12A7C_{16} = X_8$ then the value of $X$ is$224174$$425174$$6173$$225174$
Arjun
3.7k
views
Arjun
asked
Jul 6, 2016
Digital Logic
digital-logic
number-representation
isro2016
+
–
12
votes
3
answers
1995
ISRO2016-12
The logic circuit given below converts a binary code $Y_1Y_2Y_3$ into Excess-$3$ code Gray code $\text{BCD}$ code Hamming code
The logic circuit given below converts a binary code $Y_1Y_2Y_3$ into Excess-$3$ codeGray code$\text{BCD}$ codeHamming code
Arjun
8.2k
views
Arjun
asked
Jul 6, 2016
Digital Logic
digital-logic
binary-codes
isro2016
+
–
9
votes
5
answers
1996
ISRO2016-15
The Excess-$3$ code is also called Cyclic Redundancy Code Weighted Code Self-Complementing Code Algebraic Code
The Excess-$3$ code is also calledCyclic Redundancy CodeWeighted CodeSelf-Complementing CodeAlgebraic Code
go_editor
8.3k
views
go_editor
asked
Jul 6, 2016
Digital Logic
isro2016
digital-logic
binary-codes
+
–
8
votes
2
answers
1997
ISRO2016-13
The circuit given in the figure below is An oscillating circuit and its output is square wave The one whose output remains stable in $\text{‘1'}$ state The one having output remains stable in $\text{‘0'}$ state has a single pulse of three times propagation delay
The circuit given in the figure below isAn oscillating circuit and its output is square waveThe one whose output remains stable in $\text{‘1'}$ stateThe one having outp...
go_editor
4.7k
views
go_editor
asked
Jul 5, 2016
Digital Logic
isro2016
digital-logic
circuit-output
+
–
10
votes
2
answers
1998
ISRO2016-10
Consider the following gate network Which one of the following gates is redundant? Gate No. $1$ Gate No. $2$ Gate No. $3$ Gate No. $4$
Consider the following gate networkWhich one of the following gates is redundant?Gate No. $1$Gate No. $2$Gate No. $3$Gate No. $4$
go_editor
7.7k
views
go_editor
asked
Jul 5, 2016
Digital Logic
isro2016
digital-logic
circuit-output
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–
5
votes
2
answers
1999
ISRO2016-9
For a binary half-subtractor having two inputs $\text{A}$ and $\text{B}$, the correct set of logical outputs $\text{D}\;(=\text{A}\;\text{minus} \;\text{B})$ and $\text{X}(=\text{borrow})$ are $\text{D}=\text{AB}+\overline{A}\text{B, X}=\overline{\text{A}}\text{B}$ ... $\text{D}=\text{AB}+\overline{A}\text{B}, \text{X = A}\overline{\text{B}}$
For a binary half-subtractor having two inputs $\text{A}$ and $\text{B}$, the correct set of logical outputs $\text{D}\;(=\text{A}\;\text{minus} \;\text{B})$ and $\text{X...
go_editor
4.4k
views
go_editor
asked
Jul 5, 2016
Digital Logic
isro2016
digital-logic
adder
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–
14
votes
2
answers
2000
ISRO2016-8
The minimum Boolean expression for the following circuit is $\text{AB + AC + BC}$ $\text{A + BC}$ $\text{A + B}$ $\text{A + B + C}$
The minimum Boolean expression for the following circuit is$\text{AB + AC + BC}$$\text{A + BC}$$\text{A + B}$$\text{A + B + C}$
go_editor
5.4k
views
go_editor
asked
Jul 5, 2016
Digital Logic
isro2016
digital-logic
boolean-algebra
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–
6
votes
2
answers
2001
UGC NET CSE | June 2012 | Part 2 | Question: 35
If an integer needs two bytes of storage, then the maximum value of signed integer is $2^{16}-1$ $2^{15}-1$ $2^{16}$ $2^{15}$
If an integer needs two bytes of storage, then the maximum value of signed integer is$2^{16}-1$$2^{15}-1$$2^{16}$$2^{15}$
go_editor
5.2k
views
go_editor
asked
Jul 5, 2016
Digital Logic
digital-logic
number-representation
ugcnetcse-june2012-paper2
+
–
15
votes
6
answers
2002
ISRO2016-16
The simplified SOP (Sum of Product) from the Boolean expression $(\text{P} + \overline{\text{Q}} + \overline{\text{R}}) . (\text{P} + \text{Q + R) . (P + Q} +\overline{\text{R}})$ is $(\overline{\text{P}}.\text{Q}+\overline{\text{R}})$ $(\text{P + Q}.\overline{\text{R}})$ $(\text{P}.\overline{\text{Q}}+\text{R})$ $\text{(P.Q + R)}$
The simplified SOP (Sum of Product) from the Boolean expression$$(\text{P} + \overline{\text{Q}} + \overline{\text{R}}) . (\text{P} + \text{Q + R) . (P + Q} +\overline{\t...
Arjun
8.2k
views
Arjun
asked
Jul 4, 2016
Digital Logic
digital-logic
canonical-normal-form
isro2016
+
–
11
votes
4
answers
2003
ISRO2016-11
The dynamic hazard problem occurs in combinational circuit alone sequential circuit only Both (a) and (b) None of the above
The dynamic hazard problem occurs incombinational circuit alonesequential circuit onlyBoth (a) and (b)None of the above
Desert_Warrior
11.6k
views
Desert_Warrior
asked
Jul 3, 2016
Digital Logic
isro2016
digital-logic
digital-circuits
hazards
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–
4
votes
3
answers
2004
ISRO2016-18
The functional difference between $SR$ flip-flop and $J$-$K$ flip-flop is that : $J$-$K$ flip-flop is faster than $SR$ flip-flop $J$-$K$ flip-flop has a feedback path $J$-$K$ flip-flop accepts both inputs $1$ None of them
The functional difference between $SR$ flip-flop and $J$-$K$ flip-flop is that :$J$-$K$ flip-flop is faster than $SR$ flip-flop$J$-$K$ flip-flop has a feedback path$J$-$K...
sourav.
6.2k
views
sourav.
asked
Jul 3, 2016
Digital Logic
digital-logic
flip-flop
isro2016
+
–
8
votes
2
answers
2005
ISRO2016-17
Which of the following binary number is the same as its $2's$ complement ? $1010$ $0101$ $1000$ $1001$
Which of the following binary number is the same as its $2's$ complement ?$1010$$0101$$1000$$1001$
sourav.
11.4k
views
sourav.
asked
Jul 3, 2016
Digital Logic
digital-logic
number-representation
isro2016
+
–
9
votes
5
answers
2006
ISRO2014-53
Consider the logic circuit given below. The inverter, AND and OR gates have delays of $6, 10$ and $11$ nanoseconds respectively. Assuming that wire delays are negligible, what is the duration of glitch for $\text{Q}$ before it becomes stable? $5$ $11$ $16$ $27$
Consider the logic circuit given below.The inverter, AND and OR gates have delays of $6, 10$ and $11$ nanoseconds respectively. Assuming that wire delays are negligible, ...
go_editor
5.3k
views
go_editor
asked
Jul 1, 2016
Digital Logic
isro2014
digital-logic
circuit-output
+
–
7
votes
3
answers
2007
ISRO2014-26
The output of a tristate buffer when the enable input in $0$ is Always $0$ Always $1$ Retains the last value when enable input was high Disconnected state
The output of a tristate buffer when the enable input in $0$ isAlways $0$Always $1$Retains the last value when enable input was highDisconnected state
go_editor
3.8k
views
go_editor
asked
Jul 1, 2016
Digital Logic
isro2014
digital-logic
translation-lookaside-buffer
+
–
6
votes
5
answers
2008
ISRO2014-15
Consider the logic circuit given below: $\text{Q =}$ __________? $\overline{\text{A}} \text{C} + \text{B} \overline{\text{C}} +\text{CD}$ $\text{ABC} + \overline{\text{C}} \text{D}$ $\text{AB + B} \overline{\text{C}} + \text{B} \overline{\text{D}}$ $\text{A} \overline{\text{B}} + \text{A} \overline{\text{C}} + \overline{\text{C}} \text{D}$
Consider the logic circuit given below:$\text{Q =}$ __________?$\overline{\text{A}} \text{C} + \text{B} \overline{\text{C}} +\text{CD}$$\text{ABC} + \overline{\text{C}} \...
go_editor
3.9k
views
go_editor
asked
Jul 1, 2016
Digital Logic
isro2014
digital-logic
circuit-output
+
–
0
votes
0
answers
2009
Hardware Operation Chart of one digital system, anyone can help?
I try to figure out one of the tests that adopted from GATE exams, but nothing founds, anyone can describe it for me? Question: We shown the Hardware Operation Chart of one digital system in the following figure: activity of control signals for each operational ... unit how many and, or gate is needed? A) 4, 5 B) 4, 4 C) 5,3 D)4, 3
I try to figure out one of the tests that adopted from GATE exams, but nothing founds, anyone can describe it for me?Question: We shown the Hardware Operation Chart of on...
Sara Nimlon
831
views
Sara Nimlon
asked
Jun 30, 2016
CO and Architecture
digital-logic
co-and-architecture
control-unit
cpu
microprogramming
non-gate
+
–
3
votes
2
answers
2010
Online Pre-Exam for GATE Prepration on Digital Logic, Static Hazard?
Hi to all, Very challenging question is as follows: For Function F of the following which option is TRUE? I) if B=C=D=1, for any change in value A there can be static hazard 1. II) if B=C=D= ... static-hazard-in-specific-value-or-any-changes our challenge is that anyone please say why these answer disagree with this answer? thanks
Hi to all,Very challenging question is as follows:For Function F of the following which option is TRUE?I) if B=C=D=1, for any change in value A there can be static hazard...
Rank1
1.4k
views
Rank1
asked
Jun 30, 2016
Digital Logic
digital-logic
static-hazard
+
–
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