Recent questions tagged digital-logic / GATE Overflow for GATE CSE

1 votes

1 answer

211

Made Easy Boolean Algebra,Logic Gates and K-Maps

Sourin Kundu

618 views

Sourin Kundu asked Apr 13, 2023

1 votes

1 answer

212

MadeEasy Question
Consider the function f(x,y, z) = (x + y) + (yz+ y’z’ +y’z) If a is minimum number of AND gates required. If b is minimum number of OR gates required. And c is minimum number of NOR gates required. What is the value of (a +b) - c,

Consider the function f(x,y, z) = (x + y) + (yz+ y’z’ +y’z)If a is minimum number of AND gates required.If b is minimum number of OR gates required.And c is minimum...

Rohit Chakraborty

635 views

Rohit Chakraborty asked Apr 4, 2023

0 votes

0 answers

213

digital
Which of these boolean functions is/are functionally complete? A f(x, y, z) = x' + yz' B f(x, y) = x' + xy C f(x, y, z) = xy' + x' + x'z D None of these

Which of these boolean functions is/are functionally complete?A f(x, y, z) = x' + yz'B f(x, y) = x' + xyC f(x, y, z) = xy' + x' + x'zD None of th...

someshawasthi

252 views

someshawasthi asked Mar 27, 2023

1 votes

1 answer

214

GO Classes 2023 | IIITH Mock Test 1 | Question: 34
The possible number of Boolean function of 3 variables $X, Y$ and $Z$ such that $f(X, Y, Z)=f\left(X^{\prime}, Y^{\prime}, Z^{\prime}\right)$ $8$ $16$ $64$ $32$

The possible number of Boolean function of 3 variables $X, Y$ and $Z$ such that $f(X, Y, Z)=f\left(X^{\prime}, Y^{\prime}, Z^{\prime}\right)$$8$$16$$64$$32$

GO Classes

913 views

GO Classes asked Mar 26, 2023

3 votes

1 answer

215

GO Classes 2023 | IIITH Mock Test 1 | Question: 35
The figure above implements the Boolean function: $\mathrm{F}(\mathrm{A}, \mathrm{B}, \mathrm{C}, \mathrm{D})=\Sigma(0,2,3,5,6,8,12,13)$ $\mathrm{F}(\mathrm{A}, \mathrm{B}, \mathrm{C}, \mathrm{D})=\Sigma(1,3,4,6,7,8,12,13)$ ... $\mathrm{F}(\mathrm{A}, \mathrm{B}, \mathrm{C}, \mathrm{D})=\Sigma(1,3,4,6,7,8,9,11)$

The figure above implements the Boolean function:$\mathrm{F}(\mathrm{A}, \mathrm{B}, \mathrm{C}, \mathrm{D})=\Sigma(0,2,3,5,6,8,12,13)$$\mathrm{F}(\mathrm{A}, \mathrm{B},...

GO Classes

688 views

GO Classes asked Mar 26, 2023

2 votes

1 answer

216

GO Classes 2023 | IIITH Mock Test 1 | Question: 36
The $8$ to $3$ Encoder or Octal to Binary encoder consists of $8$ inputs : $O_{7}$ to $\mathrm{O}_{0}$ and $3$ outputs $: B_{2}, B_{1}$ and $\mathrm{B}_{0}$. Each input line corresponds to each octal digit and three outputs generate ... $B_{2}$ is Correct $B_{1}$ and $B_{2}$ are Correct $B_{0}$ and $B_{1}$ are Correct All of them are Correct

The $8$ to $3$ Encoder or Octal to Binary encoder consists of $8$ inputs : $O_{7}$ to $\mathrm{O}_{0}$ and $3$ outputs $: B_{2}, B_{1}$ and $\mathrm{B}_{0}$. Each input l...

GO Classes

711 views

GO Classes asked Mar 26, 2023

1 votes

1 answer

217

GO Classes 2023 | IIITH Mock Test 1 | Question: 37
A new flip-flop, called AB flip-flop, is created as shown below. What does the flip-flop do? Set command when $A = 0 , B = 0$ Reset command when $A = 0 , B = 1$ Hold command when $A = 1 ,B = 0$ Toggle command when $A = 1 , B = 1$

A new flip-flop, called AB flip-flop, is created as shown below. What does the flip-flop do?Set command when $A = 0 , B = 0$Reset command when $A = 0 , B = 1$Hold command...

GO Classes

580 views

GO Classes asked Mar 26, 2023

1 votes

1 answer

218

GO Classes 2023 | IIITH Mock Test 1 | Question: 38
In an $SR$ latch created by cross-coupling two NOR gates, which of the following values for $S$ and $R$ will lead to an indeterminate state? $S = 0, R = 0$ $S = 0, R = 1$ $S = 1, R = 0$ $S = 1, R = 1$

In an $SR$ latch created by cross-coupling two NOR gates, which of the following values for $S$ and $R$ will lead to an indeterminate state?$S = 0, R = 0$$S = 0, R = 1$$S...

GO Classes

586 views

GO Classes asked Mar 26, 2023

2 votes

1 answer

219

GO Classes 2023 | IIITH Mock Test 1 | Question: 39
Consider a $4$ input boolean function $\mathrm{F}(\mathrm{X}, \mathrm{Y}, \mathrm{Z}, \mathrm{T})$. The minterm $\mathrm{X}^{\prime} \mathrm{Y}^{\prime} \mathrm{Z}^{\prime} \mathrm{T}^{\prime}$ is known to be in the SOP form ... implicant of $F$ is a Prime Implicant. $\mathrm{F}=\mathrm{X} \oplus \mathrm{Y} \oplus \mathrm{Z} \oplus \mathrm{T}$

Consider a $4$ input boolean function $\mathrm{F}(\mathrm{X}, \mathrm{Y}, \mathrm{Z}, \mathrm{T})$.The minterm $\mathrm{X}^{\prime} \mathrm{Y}^{\prime} \mathrm{Z}^{\prime...

GO Classes

936 views

GO Classes asked Mar 26, 2023

0 votes

1 answer

220

A certain 4 input gate called a LEMON gate realizes the function LEMON(A,B,C,D) = BC(A+D). Show a realization of the function f (w,x,y,z) = Σ(0, 1, 6, 9, 10, 11, 14, 15) with only three LEMON gates and one OR gate. (Assume complemented inputs as available).

jakes

1.0k views

jakes asked Mar 22, 2023

0 votes

1 answer

221

Float representation using normalised mantissa
while representing an exponent in floating point number why do we add a biased term? What is the benifit of adding this??

while representing an exponent in floating point number why do we add a biased term? What is the benifit of adding this??

Sk Jamil Ahemad

407 views

Sk Jamil Ahemad asked Mar 19, 2023

0 votes

2 answers

222

1. Express the following function as a sum of minterms: F(A, B, C, D) = B'D+A'D + BD
1. Express the following function as a sum of minterms: F(A, B, C, D) = B'D+A'D + BD

1. Express the following function as a sum of minterms: F(A, B, C, D) = B'D+A'D + BD

moustafa

2.0k views

moustafa asked Mar 9, 2023

1 votes

2 answers

223

ripple carry adder
Half Adder is implemented with XOR and AND gate. A. FA is implemented with 2 HA and 1 OR gate The propagation delay of XOR -gate is twice that of AND / OR gate. Propagation delay of AND/OR is 1.2 ms. A 4-bit ripple carry binary adder is implemented using 4 full adder. the total propagation time of this 4 bit binary adder in micro second is ________?

Half Adder is implemented with XOR and AND gate. A. FA is implemented with 2 HA and 1 OR gate The propagation delay of XOR -gate is twice that of AND / OR gate. Propagati...

someshawasthi

1.9k views

someshawasthi asked Mar 4, 2023

8 votes

3 answers

224

GATE CSE 2023 | Question: 11
The output of a $2$-input multiplexer is connected back to one of its inputs as shown in the figure. Match the functional equivalence of this circuit to one of the following options. $\text{D}$ Flip-flop $\text{D}$ Latch Half-adder Demultiplexer

The output of a $2$-input multiplexer is connected back to one of its inputs as shown in the figure.Match the functional equivalence of this circuit to one of the followi...

admin

10.7k views

admin asked Feb 15, 2023

6 votes

2 answers

225

GATE CSE 2023 | Question: 22
A particular number is written as $132$ in radix-$4$ representation. The same number in radix-$5$ representation is _____________.

A particular number is written as $132$ in radix-$4$ representation. The same number in radix-$5$ representation is _____________.

admin

12.4k views

admin asked Feb 15, 2023

6 votes

1 answer

226

GATE CSE 2023 | Question: 33
Consider a sequential digital circuit consisting of $\mathrm{T}$ flip-flops and $\mathrm{D}$ flip-flops as shown in the figure. $\text{CLKIN}$ is the clock input to the circuit. At the beginning, $\text{Q1, Q2}$ and $\text{Q3}$ have values $0,1$ and $1,$ respectively. ... $\text{NEVER}$ be obtained with this digital circuit? $(0,0,1)$ $(1,0,0)$ $(1,0,1)$ $(1,1,1)$

Consider a sequential digital circuit consisting of $\mathrm{T}$ flip-flops and $\mathrm{D}$ flip-flops as shown in the figure. $\text{CLKIN}$ is the clock input to the c...

admin

9.0k views

admin asked Feb 15, 2023

19 votes

3 answers

227

GATE CSE 2023 | Question: 34
A Boolean digital circuit is composed using two $4$-input multiplexers $\text{(M1 and M2)}$ and one $2$-input multiplexer $\text{(M3)}$ as shown in the figure. $\text{X0-X7}$ are the inputs of the multiplexers $\text{M1 and M2}$ and could be connected to either $0$ or $1.$ The select lines of the ... $(1,1,0,0,1,1,0,1)$ $(1,1,0,1,1,1,0,0)$ $(0,0,1,1,0,1,1,1)$

A Boolean digital circuit is composed using two $4$-input multiplexers $\text{(M1 and M2)}$ and one $2$-input multiplexer $\text{(M3)}$ as shown in the figure. $\text{X0-...

admin

9.5k views

admin asked Feb 15, 2023

2 votes

1 answer

228

GATE CSE 2023 | Memory Based Question: 22
The initial state of a given sequential circuit is $Q_0 Q_1 Q_2=011$. Which of the following state does not occur $101$ $111$ $001$ $100$

The initial state of a given sequential circuit is $Q_0 Q_1 Q_2=011$. Which of the following state does not occur$101$$111$$001$$100$

GO Classes

1.1k views

GO Classes asked Feb 5, 2023

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