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Recent questions tagged gate1991
3
votes
2
answers
1
CO & architecture
The arithmetic expression $: (a + b) \ast c - d / e \ast \ast f$ is to be evaluated on a two-address machine, where each operands, the number of registers required to evaluate this expression is ______. The number of memory access of operand is __________.
Satbir
asked
in
CO and Architecture
Nov 26, 2018
by
Satbir
1.3k
views
gate1991
co-and-architecture
machine-instructions
fill-in-the-blanks
0
votes
0
answers
2
GATE CSE 1991 | Question: 07b
It is required to design a hardwired controller to handle the fetch cycle of a single address CPU with a $16$ bit instruction-length. The effective address of an indexed instruction should be derived in the fetch cycle itself. Assume ... bits of an instruction constitute the operand field. Draw the logic schematic of the hardwired controller including the data path.
go_editor
asked
in
CO and Architecture
Apr 24, 2016
by
go_editor
649
views
gate1991
co-and-architecture
control-unit
hardwired-controller
normal
unsolved
descriptive
17
votes
1
answer
3
GATE CSE 1991 | Question: 10c
Consider the following grammar for arithmetic expressions using binary operators $-$ and $/$ which are not associative $E \rightarrow E -T\mid T$ $T \rightarrow T/F\mid F$ $F \rightarrow (E) \mid id$ ($E$ is the start symbol ... given production rules and adding at most one more production rule. Convert the grammar obtained above into one that is not left recursive.
go_editor
asked
in
Compiler Design
Apr 24, 2016
by
go_editor
2.0k
views
gate1991
grammar
compiler-design
normal
descriptive
14
votes
5
answers
4
GATE CSE 1991 | Question: 10b
Consider the following grammar for arithmetic expressions using binary operators $-$ and $/$ which are not associative $E \rightarrow E -T\mid T$ $T \rightarrow T/F\mid F$ $F \rightarrow (E) \mid id$ ($E$ is the start symbol ... with redundant parentheses. Do this with minimum number of changes to the given production rules and adding at most one more production rule.
go_editor
asked
in
Compiler Design
Apr 24, 2016
by
go_editor
3.1k
views
gate1991
grammar
compiler-design
normal
descriptive
22
votes
3
answers
5
GATE CSE 1991 | Question: 09b
For the following code, indicate the output if static scope rules dynamic scope rules are used var a,b : integer; procedure P; a := 5; b := 10; end {P}; procedure Q; var a, b : integer; P; end {Q}; begin a := 1; b := 2; Q; Write ('a = ', a, 'b = ', b); end
go_editor
asked
in
Compiler Design
Apr 24, 2016
by
go_editor
3.4k
views
gate1991
runtime-environment
normal
compiler-design
parameter-passing
descriptive
30
votes
2
answers
6
GATE CSE 1991 | Question: 14,c
Consider the binary tree in the figure below: Outline a procedure in Pseudo-code to delete an arbitrary node from such a binary tree with $n$ nodes that preserves the structures. What is the worst-case time complexity of your procedure?
Akash Kanase
asked
in
DS
Apr 18, 2016
by
Akash Kanase
2.3k
views
gate1991
normal
data-structures
binary-tree
time-complexity
descriptive
18
votes
3
answers
7
GATE CSE 1991 | Question: 14,b
Consider the binary tree in the figure below: Give different steps for deleting the node with key $5$ so that the structure is preserved.
Akash Kanase
asked
in
DS
Apr 18, 2016
by
Akash Kanase
2.6k
views
gate1991
data-structures
binary-tree
normal
descriptive
8
votes
2
answers
8
GATE CSE 1991 | Question: 11,b
Consider the following scheme for implementing a critical section in a situation with three processes $P_i, P_j$ and $P_k$. Pi; repeat flag[i] := true; while flag [j] or flag[k] do case turn of j: if flag [j] then begin flag ... in which a waiting process can never enter the critical section? If so, explain and suggest modifications to the code to solve this problem
go_editor
asked
in
Operating System
Apr 18, 2016
by
go_editor
1.5k
views
gate1991
process-synchronization
normal
operating-system
descriptive
7
votes
2
answers
9
GATE CSE 1991 | Question: 12,b
Suppose a database consist of the following relations: SUPPLIER (SCODE,SNAME,CITY). PART (PCODE,PNAME,PDESC,CITY). PROJECTS (PRCODE,PRNAME,PRCITY). SPPR (SCODE,PCODE,PRCODE,QTY). Write algebraic solution to the following : Get SCODE values for ... both projects PR1 and PR2. Get PRCODE values for projects supplied by at least one supplier not in the same city.
go_editor
asked
in
Databases
Apr 18, 2016
by
go_editor
1.7k
views
sql
gate1991
normal
databases
descriptive
37
votes
4
answers
10
GATE CSE 1991 | Question: 15,b
Consider the following first order formula: ... Does it have finite models? Is it satisfiable? If so, give a countable model for it.
ibia
asked
in
Mathematical Logic
Nov 16, 2015
by
ibia
4.6k
views
gate1991
mathematical-logic
first-order-logic
descriptive
20
votes
5
answers
11
GATE CSE 1991 | Question: 17,a
Show that the Turing machines, which have a read only input tape and constant size work tape, recognize precisely the class of regular languages.
Arjun
asked
in
Theory of Computation
Nov 15, 2015
by
Arjun
4.9k
views
gate1991
theory-of-computation
descriptive
identify-class-language
proof
44
votes
3
answers
12
GATE CSE 1991 | Question: 16-b
Show that all vertices in an undirected finite graph cannot have distinct degrees, if the graph has at least two vertices.
Arjun
asked
in
Graph Theory
Nov 15, 2015
by
Arjun
3.3k
views
gate1991
graph-theory
degree-of-graph
descriptive
proof
5
votes
0
answers
13
GATE CSE 1991 | Question: 6,b
Design a $1024$ bit serial-in/serial-out unidirectional shift register using a $1K\times 1 $bit RAM with a data input $D_{in}$, data output $D_{out}$ and control input $\text{READ}/\overline{\text{WRITE}}$. You may assume the availability of standard SSI and MSI components such as gates, registers and counters.
ibia
asked
in
Digital Logic
Nov 14, 2015
by
ibia
605
views
gate1991
digital-logic
sequential-circuit
shift-registers
out-of-gate-syllabus
53
votes
5
answers
14
GATE CSE 1991 | Question: 5-c
Find the maximum clock frequency at which the counter in the figure below can be operated. Assume that the propagation delay through each flip flop and each AND gate is $10\;\text{ns}$. Also, assume that the setup time for the $JK$ inputs of the flip flops is negligible.
ibia
asked
in
Digital Logic
Nov 14, 2015
by
ibia
18.8k
views
gate1991
digital-logic
sequential-circuit
flip-flop
digital-counter
19
votes
2
answers
15
GATE CSE 1991 | Question: 5-b
Find the minimum sum of products form of the logic function $ f(A,B,C,D) = \Sigma_{m}(0,2,8,10,15)+ \Sigma _{d}(3,11,12,14)$ where $m$ and $d$ represent minterm and don't care term respectively.
ibia
asked
in
Digital Logic
Nov 14, 2015
by
ibia
2.7k
views
gate1991
digital-logic
boolean-algebra
min-sum-of-products-form
descriptive
4
votes
2
answers
16
GATE CSE 1991 | Question: 01,xi
The arithmetic expression $(a+b) * c- d/e ** l$ is to be evaluated on a two address machine, where each operand is either a register or a memory location. With a minimum number of memory accesses of operands.the number of registers required to evaluate this expression is ______. The number of memory accesses of operands is ____________
ibia
asked
in
Compiler Design
Nov 14, 2015
by
ibia
1.3k
views
gate1991
compiler-design
register-allocation
out-of-gate-syllabus
37
votes
9
answers
17
GATE CSE 1991 | Question: 17,b
Let $L$ be the language of all binary strings in which the third symbol from the right is a $1$. Give a non-deterministic finite automaton that recognizes $L$. How many states does the minimized equivalent deterministic finite automaton have? Justify your answer briefly?
Kathleen
asked
in
Theory of Computation
Sep 13, 2014
by
Kathleen
10.1k
views
gate1991
theory-of-computation
finite-automata
normal
descriptive
47
votes
2
answers
18
GATE CSE 1991 | Question: 16,a
Find the number of binary strings $w$ of length $2n$ with an equal number of $1's$ and $0's$ and the property that every prefix of $w$ has at least as many $0's$ as $1's.$
Kathleen
asked
in
Combinatory
Sep 13, 2014
by
Kathleen
4.8k
views
gate1991
combinatory
normal
descriptive
catalan-number
15
votes
5
answers
19
GATE CSE 1991 | Question: 15,a
Show that the product of the least common multiple and the greatest common divisor of two positive integers $a$ and $b$ is $a\times b$.
Kathleen
asked
in
Set Theory & Algebra
Sep 13, 2014
by
Kathleen
1.4k
views
gate1991
set-theory&algebra
normal
number-theory
proof
descriptive
23
votes
3
answers
20
GATE CSE 1991 | Question: 14,a
Consider the binary tree in the figure below: What structure is represented by the binary tree?
Kathleen
asked
in
DS
Sep 13, 2014
by
Kathleen
3.3k
views
gate1991
data-structures
binary-tree
time-complexity
normal
descriptive
24
votes
5
answers
21
GATE CSE 1991 | Question: 13
Give an optimal algorithm in pseudo-code for sorting a sequence of $n$ numbers which has only $k$ distinct numbers ($k$ is not known a Priori). Give a brief analysis for the time-complexity of your algorithm.
Kathleen
asked
in
Algorithms
Sep 13, 2014
by
Kathleen
5.1k
views
gate1991
sorting
time-complexity
algorithms
difficult
descriptive
21
votes
6
answers
22
GATE CSE 1991 | Question: 12-a
Suppose a database consist of the following relations: SUPPLIER (SCODE,SNAME,CITY). PART (PCODE,PNAME,PDESC,CITY). PROJECTS (PRCODE,PRNAME,PRCITY). SPPR (SCODE,PCODE,PRCODE,QTY). Write SQL programs corresponding to the following queries: Print PCODE values for ... part to a project in the second city, but do not print the triples in which the two CITY values are same.
Kathleen
asked
in
Databases
Sep 13, 2014
by
Kathleen
2.6k
views
gate1991
databases
sql
normal
descriptive
9
votes
2
answers
23
GATE CSE 1991 | Question: 11,a
Consider the following scheme for implementing a critical section in a situation with three processes $P_i, P_j$ and $P_k$. Pi; repeat flag[i] := true; while flag [j] or flag[k] do case turn of j: if flag [j] then begin flag [i] ... j; flag [i] := false non-critical section until false; Does the scheme ensure mutual exclusion in the critical section? Briefly explain.
Kathleen
asked
in
Operating System
Sep 13, 2014
by
Kathleen
3.3k
views
gate1991
process-synchronization
normal
operating-system
descriptive
19
votes
2
answers
24
GATE CSE 1991 | Question: 10a
Consider the following grammar for arithmetic expressions using binary operators $-$ and $/$ which are not associative $E \rightarrow E -T\mid T$ $T \rightarrow T/F\mid F$ $F \rightarrow (E) \mid id$ ($E$ is the start symbol) Is the grammar ... what is the relative precedence between $-$ and $/$? If not, give an unambiguous grammar that gives $/$ precedence over $-$.
Kathleen
asked
in
Compiler Design
Sep 13, 2014
by
Kathleen
3.6k
views
gate1991
grammar
compiler-design
normal
descriptive
26
votes
3
answers
25
GATE CSE 1991 | Question: 09a
Consider the following pseudo-code (all data items are of type integer): procedure P(a, b, c); a := 2; c := a + b; end {P} begin x := 1; y := 5; z := 100; P(x, x*y, z); Write ('x = ', x, 'z = ', z); end Determine its output, if the parameters are passed to the Procedure $\text{P}$ by value reference name
Kathleen
asked
in
Compiler Design
Sep 13, 2014
by
Kathleen
2.9k
views
gate1991
compiler-design
parameter-passing
normal
runtime-environment
descriptive
1
vote
0
answers
26
GATE CSE 1991 | Question: 08,a,b
Kathleen
asked
in
CO and Architecture
Sep 13, 2014
by
Kathleen
406
views
gate1991
co-and-architecture
out-of-syllabus-now
normal
2
votes
0
answers
27
GATE CSE 1991 | Question: 07a
It is required to design a hardwired controller to handle the fetch cycle of a single address CPU with a $16$ bit instruction-length. The effective address of an indexed instruction should be derived in the fetch cycle itself. ... bits of an instruction constitute the operand field. Give the register transfer sequence for realizing the above instruction fetch cycle.
Kathleen
asked
in
CO and Architecture
Sep 13, 2014
by
Kathleen
566
views
gate1991
co-and-architecture
control-unit
hardwired-controller
normal
unsolved
descriptive
6
votes
1
answer
28
GATE CSE 1991 | Question: 06,a
Using $\text{D}$ flip-flop gates, design a parallel-in/serial-out shift register that shifts data from left to right with the following input lines: Clock $\text{CLK}$ Three parallel data inputs $A, B, C$ Serial input $S$ Control input $\text{LOAD} / \overline{\text{SHIFT}}$.
Kathleen
asked
in
Digital Logic
Sep 13, 2014
by
Kathleen
951
views
gate1991
digital-logic
difficult
sequential-circuit
flip-flop
shift-registers
descriptive
24
votes
1
answer
29
GATE CSE 1991 | Question: 5-a
Analyse the circuit in Fig below and complete the following table ${\begin{array}{|c|c|c|}\hline \textbf{a}& \textbf{b}& \bf{ Q_n} \\\hline 0&0\\\ 0&1 \\ 1&0 \\ 1&1 \\ \hline \end{array}}$
Kathleen
asked
in
Digital Logic
Sep 13, 2014
by
Kathleen
3.1k
views
gate1991
digital-logic
normal
circuit-output
sequential-circuit
descriptive
4
votes
0
answers
30
GATE CSE 1991 | Question: 04,i,ii,iii,iv
Kathleen
asked
in
Others
Sep 12, 2014
by
Kathleen
435
views
gate1991
pascal
out-of-syllabus-now
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