# Recent questions tagged gate1991 1 vote
1
The arithmetic expression : (a + b) * c - d / e * * f is to be evaluated on a two-address machine, where each operands, the number of registers required to evaluate this expression is ______. The number of memory access of operand is __________.
2
Indicate all the true statements from the following: (a) A programming language not supporting either recursion or pointer type does not need the support of dynamic memory allocation. (b) Although C does not support call by name parameter passing, the effect can be correctly simulated in C.
3
It is required to design a hardwired controller to handle the fetch cycle of a single address CPU with a $16$ bit instruction-length. The effective address of an indexed instruction should be derived in the fetch cycle itself. Assume that the lower order $8$ bits of an instruction constitute the operand field. Draw the logic schematic of the hardwired controller including the data path.
4
Consider the following grammar for arithmetic expressions using binary operators $-$ and $/$ which are not associative $E \rightarrow E -T\mid T$ $T \rightarrow T/F\mid F$ $F \rightarrow (E) \mid id$ ($E$ is the start symbol) Does the grammar ... to the given production rules and adding at most one more production rule. Convert the grammar obtained above into one that is not left recursive.
5
Consider the following grammar for arithmetic expressions using binary operators $-$ and $/$ which are not associative $E \rightarrow E -T\mid T$ $T \rightarrow T/F\mid F$ $F \rightarrow (E) \mid id$ ($E$ is the start symbol) Does ... generate expressions with redundant parentheses. Do this with minimum number of changes to the given production rules and adding at most one more production rule.
6
For the following code, indicate the output if static scope rules dynamic scope rules are used var a,b : integer; procedure P; a := 5; b := 10; end {P}; procedure Q; var a, b : integer; P; end {Q}; begin a := 1; b := 2; Q; Write ('a = ', a, 'b = ', b); end
7
Consider the binary tree in the figure below: Outline a procedure in Pseudo-code to delete an arbitrary node from such a binary tree with $n$ nodes that preserves the structures. What is the worst-case-time-complexity of your procedure?
8
Consider the binary tree in the figure below: Give different steps for deleting the node with key $5$ so that the structure is preserved.
9
Consider the following scheme for implementing a critical section in a situation with three processes $P_i, P_j$ and $P_k$. Pi; repeat flag[i] := true; while flag [j] or flag[k] do case turn of j: if flag [j] then begin flag [i] := false; ... there a situation in which a waiting process can never enter the critical section? If so, explain and suggest modifications to the code to solve this problem
10
Suppose a database consist of the following relations: SUPPLIER (SCODE,SNAME,CITY). PART (PCODE,PNAME,PDESC,CITY). PROJECTS (PRCODE,PRNAME,PRCITY). SPPR (SCODE,PCODE,PRCODE,QTY). Write algebraic solution to the following : Get SCODE values for suppliers who supply to both projects PR1 and PR2. Get PRCODE values for projects supplied by at least one supplier not in the same city.
11
Consider the following first order formula: ... Does it have finite models? Is it satisfiable? If so, give a countable model for it.
12
Show that the Turing machines, which have a read only input tape and constant size work tape, recognize precisely the class of regular languages.
13
Show that all vertices in an undirected finite graph cannot have distinct degrees, if the graph has at least two vertices.
14
Design a 1024 bit serial-in/serial-out unidirectional shift register using a 1K $\times$ 1 bit RAM with a data input $D_{in}$, data output $D_{out}$ and control input $\text{READ}/\overline{\text{WRITE}}$. You may assume the availability of standard SSI and MSI components such as gates, registers and counters.
15
Find the maximum clock frequency at which the counter in the figure below can be operated. Assume that the propagation delay through each flip flop and each AND gate is $10$ $\text{ns}$. Also assume that the setup time for the $JK$ inputs of the flip flops is negligible.
16
Find the minimum sum of products form of the logic function $f(A,B,C,D) = \Sigma m(0,2,8,10,15)+ \Sigma d(3,11,12,14)$ where $m$ and $d$ represent minterm and don't care term respectively.
17
The arithmetic expression $(a+b) * c- d/e ** l$ is to be evaluated on a two address machine, where each operand is either a register or a memory location. With a minimum number of memory accesses of operands.the number of registers required to evaluate this expression is ______. The number of memory accesses of operands is ____________
18
Let $L$ be the language of all binary strings in which the third symbol from the right is a $1$. Give a non-deterministic finite automaton that recognizes $L$. How many states does the minimized equivalent deterministic finite automaton have? Justify your answer briefly?
19
Find the number of binary strings $w$ of length $2n$ with an equal number of $1's$ and $0's$ and the property that every prefix of $w$ has at least as many $0's$ as $1's.$
20
Show that the product of the least common multiple and the greatest common divisor of two positive integers $a$ and $b$ is $a\times b$.
21
Consider the binary tree in the figure below: (a). What structure is represented by the binary tree?
22
Give an optimal algorithm in pseudo-code for sorting a sequence of $n$ numbers which has only $k$ distinct numbers ($k$ is not known a Priori). Give a brief analysis for the time-complexity of your algorithm.
23
Suppose a database consist of the following relations: SUPPLIER (SCODE,SNAME,CITY). PART (PCODE,PNAME,PDESC,CITY). PROJECTS (PRCODE,PRNAME,PRCITY). SPPR (SCODE,PCODE,PRCODE,QTY). Write SQL programs corresponding to the following queries: Print PCODE values for parts supplied to ... specified part to a project in the second city, but do not print the triples in which the two CITY values are same.
24
Consider the following scheme for implementing a critical section in a situation with three processes $P_i, P_j$ and $P_k$. Pi; repeat flag[i] := true; while flag [j] or flag[k] do case turn of j: if flag [j] then begin flag [i] := false; while turn ... turn := j; flag [i] := false non-critical section until false; Does the scheme ensure mutual exclusion in the critical section? Briefly explain.
25
Consider the following grammar for arithmetic expressions using binary operators $-$ and $/$ which are not associative $E \rightarrow E -T\mid T$ $T \rightarrow T/F\mid F$ $F \rightarrow (E) \mid id$ ($E$ is the start symbol) Is the grammar unambiguous? Is so, what is the relative precedence between $-$ and $/$? If not, give an unambiguous grammar that gives $/$ precedence over $-$.
26
Consider the following pseudo-code (all data items are of type integer): procedure P(a, b, c); a := 2; c := a + b; end {P} begin x := 1; y := 5; z := 100; P(x, x*y, z); Write ('x = ', x, 'z = ', z); end Determine its output, if the parameters are passed to the Procedure P by value reference name
1 vote
It is required to design a hardwired controller to handle the fetch cycle of a single address CPU with a $16$ bit instruction-length. The effective address of an indexed instruction should be derived in the fetch cycle itself. Assume that the lower order $8$ bits of an instruction constitute the operand field. Give the register transfer sequence for realizing the above instruction fetch cycle.
Using D flip-flop gates, design a parallel-in/serial-out shift register that shifts data from left to right with the following input lines: Clock $\text{CLK}$ Three parallel data inputs $A, B, C$ Serial input $S$ Control input $\text{load} / \overline{\text{SHIFT}}$.
Analyse the circuit in Fig below and complete the following table ${\begin{array}{|c|c|c|}\hline \textbf{a}& \textbf{b}& \bf{ Q_n} \\\hline 0&0\\\ 0&1 \\ 1&0 \\ 1&1 \\ \hline \end{array}}$