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Use the google search bar on side panel. It searches through all previous GATE/other questions. For hardcopy of previous year questions please see
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Recent questions tagged gate1999
GATE 1999 Computer Science questions and solutions
+1
vote
2
answers
1
GATE199920b
Consider the following solution to the producerconsumer problem using a buffer of size 1. Assume that the initial value of count is 0. Also assume that the testing of count and assignment to count are atomic operations. Producer: Repeat Produce an item; if ... ); Consume item; Forever; Show that in this solution it is possible that both the processes are sleeping at the same time.
asked
Feb 28, 2018
in
Operating System
by
jothee
Veteran
(
115k
points)

306
views
gate1999
operatingsystem
processsynchronization
normal
0
votes
2
answers
2
GATE199922b
Consider the set of relations EMP (Employeeno. Deptno, Employeename, Salary) DEPT (Deptno. Deptname, Location) Write an SQL query to: Calculate, for each department number, the number of employees with a salary greater than Rs. 1,00,000
asked
Feb 8, 2018
in
Databases
by
jothee
Veteran
(
115k
points)

217
views
gate1999
databases
sql
easy
+17
votes
1
answer
3
GATE199911b
Write a constant time algorithm to insert a node with data $D$ just before the node with address $p$ of a singly linked list.
asked
Dec 17, 2016
in
DS
by
Arjun
Veteran
(
396k
points)

548
views
gate1999
datastructure
linkedlists
+11
votes
3
answers
4
GATE19993
Mr. X claims the following: If a relation R is both symmetric and transitive, then R is reflexive. For this, Mr. X offers the following proof: “From xRy, using symmetry we get yRx. Now because R is transitive xRy and yRx together imply xRx. Therefore, R is reflexive”. Give an example of a relation R which is symmetric and transitive but not reflexive.
asked
Sep 24, 2014
in
Set Theory & Algebra
by
Kathleen
Veteran
(
59.8k
points)

789
views
gate1999
settheory&algebra
relations
normal
descriptive
+15
votes
2
answers
5
GATE199922a
Consider the set of relations EMP (Employeeno. Deptno, Employeename, Salary) DEPT (Deptno. Deptname, Location) Write an SQL query to: a)Find all employees names who work in departments located at ‘Calcutta’ and whose salary is greater than Rs.50,000. b)Calculate, for each department number, the number of employees with a salary greater than Rs. 1,00,000.
asked
Sep 24, 2014
in
Databases
by
Kathleen
Veteran
(
59.8k
points)

1.2k
views
gate1999
databases
sql
easy
+20
votes
2
answers
6
GATE199921
Consider a Btree with degree $m$, that is, the number of children, $c$, of any internal note (except the root) is such that $m \leq c \leq 2m1$. Derive the maximum and minimum number of records in the leaf nodes for such a Btree with height $h, h \geq 1$. (Assume that the root of a tree is at height 0).
asked
Sep 24, 2014
in
Databases
by
Kathleen
Veteran
(
59.8k
points)

2.5k
views
gate1999
databases
btree
normal
+15
votes
4
answers
7
GATE199920a
A certain processor provides a 'test and set' instruction that is used as follows: TSET register, flag This instruction atomically copies flag to register and sets flag to $1$. Give pseudocode for implementing the entry and exit code to a critical region using this instruction.
asked
Sep 24, 2014
in
Operating System
by
Kathleen
Veteran
(
59.8k
points)

1.3k
views
gate1999
operatingsystem
processsynchronization
normal
+22
votes
2
answers
8
GATE199919
A certain computer system has the segmented paging architecture for virtual memory. The memory is byte addressable. Both virtual and physical address spaces contain $2^{16}$ bytes each. The virtual address space is divided into $8$ nonoverlapping equal size ... available in page table entry for storing the aging information for the page? Assume that the page size is $512$ bytes.
asked
Sep 24, 2014
in
Operating System
by
Kathleen
Veteran
(
59.8k
points)

3.7k
views
gate1999
operatingsystem
virtualmemory
normal
0
votes
0
answers
9
GATE199918
Design a 2K $\times$ 8 (2048 locations, each 8 bit wide) memory system mapped at addresses (1000)$_{16}$ to (17FF)$_{16}$ for the 8085 processor using four 1K $\times$ 4 memory chips. Each of these chips has the following signal pins: $\overline{CS}$ ... (input address lines. $A_0$ is the lest significant) $D_0, D_1, D_2, D_3$ (bidirectional data lines. $D_0$ is the least significant)
asked
Sep 24, 2014
in
CO & Architecture
by
Kathleen
Veteran
(
59.8k
points)

204
views
gate1999
coandarchitecture
8085
outofsyllabusnow
+11
votes
1
answer
10
GATE199917
Consider the following program fragment in the assembly language of a certain hypothetical processor. The processor has three general purpose registers $R1, R2$and $R3$. The meanings of the instructions are shown by comments (starting with ;) after the instructions. X: CMP ... contain the values n, 0, and 0 respectively. What is the final value of $R3$ when control reaches $Z$?
asked
Sep 24, 2014
in
CO & Architecture
by
Kathleen
Veteran
(
59.8k
points)

1.4k
views
gate1999
coandarchitecture
machineinstructions
normal
0
votes
0
answers
11
GATE199916
asked
Sep 24, 2014
in
Non GATE
by
Kathleen
Veteran
(
59.8k
points)

154
views
gate1999
outofsyllabusnow
pascal
+2
votes
1
answer
12
GATE199915
What will be the output of the following program assuming that parameter passing is call by value call by reference call by copy restore procedure P{x, y, z}; begin y:y+1; z: x+x end; begin a:= b:= 3; P(a+b, a, a); Print(a) end.
asked
Sep 24, 2014
in
Programming
by
Kathleen
Veteran
(
59.8k
points)

1.2k
views
gate1999
programming
parameterpassing
normal
+8
votes
2
answers
13
GATE199914
Show that the formula $\left[(\sim p \vee q) \Rightarrow (q \Rightarrow p)\right]$ is not a tautology. Let $A$ be a tautology and $B$ any other formula. Prove that $(A \vee B)$ is a tautology.
asked
Sep 24, 2014
in
Mathematical Logic
by
Kathleen
Veteran
(
59.8k
points)

429
views
gate1999
mathematicallogic
normal
propositionallogic
proof
descriptive
+16
votes
3
answers
14
GATE199913
An instruction pipeline consists of 4 stages  Fetch (F), Decode field (D), Execute (E) and Result Write (W). The 5 instructions in a certain instruction sequence need these stages for the different number of clock cycles as shown by the table below No. of cycles needed ... $1$} & \text{$2$} \\\hline \end{array} Find the number of clock cycles needed to perform the $5$ instructions.
asked
Sep 24, 2014
in
CO & Architecture
by
Kathleen
Veteran
(
59.8k
points)

1.6k
views
gate1999
coandarchitecture
pipelining
normal
+13
votes
3
answers
15
GATE199912
In binary tree, a full node is defined to be a node with $2$ children. Use induction on the height of the binary tree to prove that the number of full nodes plus one is equal to the number of leaves. Draw the minheap that results from insertion of the following elements in ... initially empty minheap: $7, 6, 5, 4, 3, 2, 1$. Show the result after the deletion of the root of this heap.
asked
Sep 24, 2014
in
DS
by
Kathleen
Veteran
(
59.8k
points)

973
views
gate1999
datastructure
heap
normal
+20
votes
2
answers
16
GATE199911a
Consider the following algorithms. Assume, procedure $A$ and procedure $B$ take $O (1)$ and $O(1/n)$ unit of time respectively. Derive the time complexity of the algorithm in $O$notation. algorithm what (n) begin if n = 1 then call A else begin what (n1); call B(n) end end.
asked
Sep 23, 2014
in
Algorithms
by
Kathleen
Veteran
(
59.8k
points)

1.7k
views
gate1999
algorithms
timecomplexity
normal
+4
votes
0
answers
17
GATE199910
Suppose we have a function HALTS which when applied to any arbitrary function $f$ and its arguments will say TRUE if function $f$ terminates for those arguments and FALSE otherwise. Example: Given the following function definition. FACTORIAL (N) = IF (N ... to have a function like HALTS which for arbitrary functions and inputs says whether it will terminate on that input or not.
asked
Sep 23, 2014
in
Theory of Computation
by
Kathleen
Veteran
(
59.8k
points)

261
views
gate1999
theoryofcomputation
normal
+2
votes
0
answers
18
GATE19999
Let synthesized attribute val give the value of the binary number generated by S in the following grammar. For example, on input 101.101, S.val = 5.625. $S \rightarrow L.L \mid L$ $L \rightarrow LB \mid B$ $B \rightarrow 0 \mid 1$ Write Sattributed values corresponding to each of the productions to find S.val.
asked
Sep 23, 2014
in
Compiler Design
by
Kathleen
Veteran
(
59.8k
points)

545
views
gate1999
compilerdesign
grammar
normal
+20
votes
2
answers
19
GATE19998
Let $A$ be an $n \times n$ matrix such that the elements in each row and each column are arranged in ascending order. Draw a decision tree, which finds $1$st, $2$nd and $3$rd smallest elements in minimum number of comparisons.
asked
Sep 23, 2014
in
Algorithms
by
Kathleen
Veteran
(
59.8k
points)

1.1k
views
gate1999
algorithms
sorting
normal
descriptive
+20
votes
1
answer
20
GATE19997
Show that the language $L = \left\{ xcx \mid x \in \left\{0,1\right\}^* \text{ and }c\text{ is a terminal symbol}\right\}$ is not context free. $c$ is not $0$ or $1$.
asked
Sep 23, 2014
in
Theory of Computation
by
Kathleen
Veteran
(
59.8k
points)

817
views
gate1999
theoryofcomputation
contextfreelanguage
normal
+15
votes
3
answers
21
GATE19996
Given that $A$ is regular and $(A \cup B)$ is regular, does it follow that $B$ is necessarily regular? Justify your answer. Given two finite automata $M1, M2$, outline an algorithm to decide if $L(M1) \subset L(M2)$. (note: strict subset)
asked
Sep 23, 2014
in
Theory of Computation
by
Kathleen
Veteran
(
59.8k
points)

819
views
gate1999
theoryofcomputation
normal
regularlanguages
+18
votes
5
answers
22
GATE19995
Let $G$ be a connected, undirected graph. A cut in $G$ is a set of edges whose removal results in $G$ being broken into two or more components, which are not connected with each other. The size of a cut is called its cardinality. A mincut of $G$ is a cut in $G$ of ... $n$ vertices has a mincut of cardinality $k$, then $G$ has at least $\left(\frac{n\times k}{2}\right)$ edges.
asked
Sep 23, 2014
in
Graph Theory
by
Kathleen
Veteran
(
59.8k
points)

1.1k
views
gate1999
graphtheory
graphconnectivity
normal
+2
votes
0
answers
23
GATE19994
Let $G$ be a finite group and $H$ be a subgroup of $G$. For $a \in G$, define $aH=\left\{ah \mid h \in H\right\}$. Show that $aH = H$ Show that for every pair of elements $a, b \in G$, either $aH = bH$ or $aH$ and $bH$ are disjoint Use the above to argue that the order of $H$ must divide the order of $G$
asked
Sep 23, 2014
in
Set Theory & Algebra
by
Kathleen
Veteran
(
59.8k
points)

350
views
gate1999
settheory&algebra
groups
normal
+24
votes
1
answer
24
GATE19992.25
Which of the following is/are correct? An SQL query automatically eliminates duplicates An SQL query will not work if there are no indexes on the relations SQL permits attribute names to be repeated in the same relation None of the above
asked
Sep 23, 2014
in
Databases
by
Kathleen
Veteran
(
59.8k
points)

3.4k
views
gate1999
databases
sql
easy
+20
votes
3
answers
25
GATE19992.24
Consider the following $C$ function definition int Trial (int a, int b, int c) { if ((a>=b) && (c<b)) return b; else if (a>=b) return Trial(a, c, b); else return Trial(b, a, c); } The functional Trial: Finds the maximum of $a$, $b$, and $c$ Finds the minimum of $a$, $b$, and $c$ Finds the middle number of $a$, $b$, $c$ None of the above
asked
Sep 23, 2014
in
Algorithms
by
Kathleen
Veteran
(
59.8k
points)

2.7k
views
gate1999
algorithms
identifyfunction
normal
+26
votes
2
answers
26
GATE19992.23
A certain processor supports only the immediate and the direct addressing modes. Which of the following programming language features cannot be implemented on this processor? Pointers Arrays Records Recursive procedures with local variable
asked
Sep 23, 2014
in
CO & Architecture
by
Kathleen
Veteran
(
59.8k
points)

3.5k
views
gate1999
coandarchitecture
addressingmodes
normal
+16
votes
2
answers
27
GATE19992.22
The main difference(s) between a CISC and a RISC processor is/are that a RISC processor typically has fewer instructions has fewer addressing modes has more registers is easier to implement using hardwired logic
asked
Sep 23, 2014
in
CO & Architecture
by
Kathleen
Veteran
(
59.8k
points)

1.9k
views
gate1999
coandarchitecture
normal
ciscriscarchitecture
+24
votes
6
answers
28
GATE19992.21
If $T_1 = O(1)$, give the correct matching for the following pairs: $\begin{array}{ll}\hline \text{(M) $T_n = T_{n1} + n$} & \text{(U) $T_n = O(n)$} \\\hline \text{(N) $T_n = T_{n/2} + n$} & \text{(V) $T_n = O(n \log n)$} \\\hline \text{(O) $ ... $\text{MW, NU, OX, PV}$ $\text{MV, NW, OX, PU}$ $\text{MW, NU, OV, PX}$
asked
Sep 23, 2014
in
Algorithms
by
Kathleen
Veteran
(
59.8k
points)

2.9k
views
gate1999
algorithms
recurrence
asymptoticnotations
normal
+8
votes
2
answers
29
GATE19992.19
Arrange the following configuration for CPU in decreasing order of operating speeds: Hard wired control, Vertical microprogramming, Horizontal microprogramming. Hard wired control, Vertical microprogramming, Horizontal microprogramming. Hard ... microprogramming, Vertical microprogramming, Hard wired control. Vertical microprogramming, Horizontal microprogramming, Hard wired control.
asked
Sep 23, 2014
in
CO & Architecture
by
Kathleen
Veteran
(
59.8k
points)

1.6k
views
gate1999
coandarchitecture
microprogramming
normal
+15
votes
5
answers
30
GATE1999218, ISRO200846
Raid configurations of the disks are used to provide Faulttolerance High speed High data density (A) & (B)
asked
Sep 23, 2014
in
Operating System
by
Kathleen
Veteran
(
59.8k
points)

3.4k
views
gate1999
operatingsystem
disks
easy
isro2008
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