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Recent questions tagged interrupts
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31
MadeEasyTestSeries
Consider a system employing interrupt driven IO for a particular device that transfer data at a rate of 8KB/sec continuously. Consider interrupt processing time about 100 microsec. The fraction of processor time consumed by this IO if interrupt occurs on every byte is ______?
Consider a system employing interrupt driven IO for a particular device that transfer data at a rate of 8KB/sec continuously. Consider interrupt processing time about 100...
dharmesh7
340
views
dharmesh7
asked
Jan 25, 2019
CO and Architecture
co-and-architecture
interrupts
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–
4
votes
1
answer
32
Applied Course | Mock GATE | Test 1 | Question: 62
Consider a $32$ bit, $10$ MIPS processor with an interrupt driven interface. Suppose a hard disk has a $16$ bit data bus and is connected to the processor and its transfer rate is $50 \:KB$ per second. ... instructions per second) $256000$ instructions per second $512000$ instructions per second $1024000$ instructions per second None of the above
Consider a $32$ bit, $10$ MIPS processor with an interrupt driven interface. Suppose a hard disk has a $16$ bit data bus and is connected to the processor and its transfe...
Applied Course
759
views
Applied Course
asked
Jan 16, 2019
CO and Architecture
applied-course-2019-mock1
io-handling
co-and-architecture
interrupts
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2
votes
1
answer
33
Interrupt Service Routing ( Applied course Mock 3)
Consider a process P1 that is executing on a Linux-like OS on a single core system. When P1 is executing, a disk interrupt occurs, causing P1 to go to kernel mode to service that interrupt. The interrupt delivers all the disk blocks that unblock ... is ready P1 is ready and P2 is running P1 is running and P2 is ready P1 is blocked and P2 is ready
Consider a process P1 that is executing on a Linux-like OS on a single core system. When P1 is executing, a disk interrupt occurs, causing P1 to go to kernel mode to serv...
Mk Utkarsh
1.8k
views
Mk Utkarsh
asked
Jan 14, 2019
Operating System
interrupts
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0
votes
0
answers
34
UPPCL AE 2018:19
Consider the following statements regarding interrupts. If a process is interrupted during system call handling then the $\text{OS}$ will crash. If a process is interrupted during system call handling then the process is moved to the $\text{READY}$ queue. If an interrupt handler is ... of the above $\text{III}$ only $\text{II}$ and $\text{III}$ $\text{I}$ and $\text{III}$
Consider the following statements regarding interrupts.If a process is interrupted during system call handling then the $\text{OS}$ will crash.If a process is interrupted...
admin
259
views
admin
asked
Jan 5, 2019
Operating System
uppcl2018
operating-system
system-call
interrupts
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1
votes
2
answers
35
DMA,interrupts
True/false 1. To access bus the DMA does not issue an interrupt it is done through DMA-request and DMA-acknowledge wires. Interrupt is issued by DMA to CPU only after complete data is transferred to the specific memory address by DMA. 2. DMA interrupts the CPU whenever it needs to initiate I/O and also when it has finished I/O transfers.
True/false1. To access bus the DMA does not issue an interrupt it is done through DMA-request and DMA-acknowledge wires. Interrupt is issued by DMA to CPU only after comp...
Gurdeep Saini
1.1k
views
Gurdeep Saini
asked
Jan 4, 2019
CO and Architecture
dma
co-and-architecture
interrupts
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1
votes
0
answers
36
SelfDoubtCOA1
A processor needs Software interrupt to obtain system service which need execution of privileged instruction. can u plz explain the term and need of Software interrupt.
A processor needs Software interrupt to obtain system service which need execution of privileged instruction.can u plz explain the term and need of Software interrupt.
Abhisek Tiwari 4
259
views
Abhisek Tiwari 4
asked
Dec 30, 2018
CO and Architecture
co-and-architecture
interrupts
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0
votes
1
answer
37
Computer Organization
What is a TRAP instruction and how it is used?
What is a TRAP instruction and how it is used?
Leelakrishna Akhil
463
views
Leelakrishna Akhil
asked
Dec 10, 2018
CO and Architecture
co-and-architecture
interrupts
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0
votes
0
answers
38
Made easy CO
Here is my approach, transmission time for 1 B -> 1/16kB =1000/16 =62.5micro sec now the processor is 50 micro sec Now since it is interrupted for every Byte, then consider one Byte Transfer- processor time consumed should be - 50/(50+62.5) =0.44 44.44% please tell me where I m wrong,
Here is my approach,transmission time for 1 B - 1/16kB =1000/16 =62.5micro secnow the processor is 50 micro secNow since it is interrupted for every Byte, then consider...
garimanand
492
views
garimanand
asked
Nov 18, 2018
CO and Architecture
co-and-architecture
interrupts
numerical-answers
made-easy-test-series
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0
votes
0
answers
39
made easy test series
Answer is 12.5.
Answer is 12.5.
amitqy
265
views
amitqy
asked
Nov 2, 2018
CO and Architecture
co-and-architecture
disk
interrupts
speedup
numerical-answers
made-easy-test-series
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1
votes
1
answer
40
I/O-COA
I think percentage of processor time consumed should be $\frac{ \,ISR\,time}{ISR\,time+\,Data\,Transfer\,Time}=\frac{100}{100+122}$. Is it correct?
I think percentage of processor time consumed should be $\frac{ \,ISR\,time}{ISR\,time+\,Data\,Transfer\,Time}=\frac{100}{100+122}$.Is it correct?
Ayush Upadhyaya
1.2k
views
Ayush Upadhyaya
asked
Oct 30, 2018
CO and Architecture
co-and-architecture
interrupts
io-handling
numerical-answers
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1
votes
0
answers
41
Vectored or non vectored Interrupt
In this state diagram of interrupt, where interrupt service routine is used? Why both hardware and software control are needed to service an interrupt? PC,PSW and ISR how it execute one after another, I just getting problem which is the order of coming these to process interrupt and why?(Any easy discussion on this)
In this state diagram of interrupt, where interrupt service routine is used? Why both hardware and software control are needed to service an interrupt?PC,PSW and ISR how ...
srestha
2.8k
views
srestha
asked
Oct 27, 2018
Operating System
interrupts
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0
votes
0
answers
42
TANCET 2017 INTERRUPT
Balaji Jegan
169
views
Balaji Jegan
asked
Oct 23, 2018
CO and Architecture
tancet2017
co-and-architecture
interrupts
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0
votes
1
answer
43
TANCET 2016 Interrupt
Balaji Jegan
173
views
Balaji Jegan
asked
Oct 23, 2018
CO and Architecture
tancet2016
co-and-architecture
interrupts
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–
2
votes
2
answers
44
Non Vectored Interrupt
Na462
1.7k
views
Na462
asked
Oct 21, 2018
CO and Architecture
interrupts
co-and-architecture
io-handling
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0
votes
1
answer
45
#Interrupts #OS Doubt.
When an interrupt occurs, an operating system can ignore the interrupt? Please tell the answer with reasoning? Thank you!
When an interrupt occurs, an operating system can ignore the interrupt?Please tell the answer with reasoning? Thank you!
iarnav
521
views
iarnav
asked
Oct 12, 2018
Operating System
operating-system
interrupts
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0
votes
0
answers
46
Gate questions
https://gateoverflow.in/1657/gate1998-1-20 https://gateoverflow.in/1300/gate2009-8-ugcnet-june2012-iii-58 The answer assumes execution means the execute phase in a pipelined system while in the other answer, execution means the execution of an entire instruction. How ... assume what? Option C is considered as wrong in the first link while it is the correct answer in the second link.
https://gateoverflow.in/1657/gate1998-1-20https://gateoverflow.in/1300/gate2009-8-ugcnet-june2012-iii-58The answer assumes execution means the execute phase in a pipeline...
gauravkc
376
views
gauravkc
asked
Sep 30, 2018
CO and Architecture
interrupts
co-and-architecture
self-doubt
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1
votes
1
answer
47
Vectored I/O
Na462
843
views
Na462
asked
Sep 24, 2018
CO and Architecture
co-and-architecture
interrupts
io-handling
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0
votes
0
answers
48
Interrupt handling
Give an example each for a hardware interrupt, an explicit software interrupt, and an implicit software interrupt, and discuss the possible operations as part of the interrupt handler.
Give an example each for a hardware interrupt, an explicit software interrupt, and an implicit software interrupt, and discuss the possible operations as part of the inte...
dd
411
views
dd
asked
Sep 13, 2018
Operating System
interrupts
operating-system
non-gate
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4
votes
1
answer
49
I/O operation
Please Explain Every Point :) Ans. All are Correct
Please Explain Every Point :)Ans. All are Correct
Na462
1.9k
views
Na462
asked
Aug 13, 2018
CO and Architecture
co-and-architecture
interrupts
io-handling
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0
votes
0
answers
50
Interrupt
1)What is difference between internal interrupt and software interrupt? 2) What is difference between external interrupt and hardware interrupt?
1)What is difference between internal interrupt and software interrupt?2) What is difference between external interrupt and hardware interrupt?
srestha
713
views
srestha
asked
Jul 26, 2018
Operating System
interrupts
co-and-architecture
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–
3
votes
5
answers
51
MadeEasy Test Series: CO & Architecture - Io Handling
Consider a system employing interrupt driven I/O for a particular device that transfer data at an average of 8 KB/sec on a continuous basis. Consider interrupt processing takes about 100 μsec i.e. time to jump to ISR, execute it and return ... if interrupts occur for every byte is ________. [Assume 1 K = 1024] (Upto 2 decimal places) Ans. 0.81
Consider a system employing interrupt driven I/O for a particular device that transfer data at an average of 8 KB/sec on a continuous basis. Consider interrupt processing...
Na462
2.4k
views
Na462
asked
Jul 25, 2018
CO and Architecture
co-and-architecture
interrupts
made-easy-test-series
io-handling
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0
votes
4
answers
52
UGC NET CSE | July 2018 | Part 2 | Question: 97
Match the items in $\textbf{List-I}$ and $\textbf{List-II}$ ... $\text{(a)-(iii), (b)-(i), (c)-(ii)}$ $\text{(a)-(iii), (b)-(iv), (c)-(ii)}$
Match the items in $\textbf{List-I}$ and $\textbf{List-II}$ :$\begin{array}{clcl} {} & {\textbf{List-I}} & {} & {\textbf{List-II}} \\ \text{(a)} & \text{interrupts whi...
Pooja Khatri
2.6k
views
Pooja Khatri
asked
Jul 13, 2018
CO and Architecture
ugcnetcse-july2018-paper2
co-and-architecture
assembly
interrupts
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–
0
votes
0
answers
53
Vectored Interrupts
Are Vectored Interrupts possible in CPU having single Interrupt Request line? How/Why not?
Are Vectored Interrupts possible in CPU having single Interrupt Request line? How/Why not?
Harsh Kumar
503
views
Harsh Kumar
asked
Jun 2, 2018
CO and Architecture
co-and-architecture
interrupts
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–
23
votes
4
answers
54
GATE CSE 2018 | Question: 9
The following are some events that occur after a device controller issues an interrupt while process $L$ is under execution. P. The processor pushes the process status of $L$ onto the control stack Q. The processor finishes the execution of the ... based on the interrupt Which of the following is the correct order in which the events above occur? QPTRS PTRSQ TRPQS QTPRS
The following are some events that occur after a device controller issues an interrupt while process $L$ is under execution.P. The processor pushes the process status of ...
gatecse
10.5k
views
gatecse
asked
Feb 14, 2018
Operating System
gatecse-2018
operating-system
interrupts
normal
1-mark
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–
2
votes
2
answers
55
Gateforum Tests
Can anybody explain in brief how to solve such numericals.
Can anybody explain in brief how to solve such numericals.
vishal chugh
708
views
vishal chugh
asked
Jan 15, 2018
CO and Architecture
co-and-architecture
interrupts
io-interface
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–
1
votes
1
answer
56
Test Series
vishal chugh
345
views
vishal chugh
asked
Jan 13, 2018
CO and Architecture
interrupts
programmed-io
co-and-architecture
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–
3
votes
1
answer
57
Address after Halt instruction
Consider that the memory is byte addressable with size 16 bits, and the program has been loaded starting from memory location (2000)10. What will be the return address saved in the stack, if an interrupt occurs while the CPU has been halted after executing the HALT instruction? I am getting 2018.
Consider that the memory is byte addressable with size 16 bits, and the program has been loaded starting from memory location (2000)10. What will be the return address sa...
Shubhanshu
2.1k
views
Shubhanshu
asked
Jan 2, 2018
CO and Architecture
co-and-architecture
interrupts
machine-instruction
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–
1
votes
2
answers
58
Interrupts
In case of Vectored interrupts,the I/o device send the vector address along with the I/o request or does it sends after it receives ack/INTA from CPU?
In case of Vectored interrupts,the I/o device send the vector address along with the I/o request or does it sends after it receives ack/INTA from CPU?
rahul sharma 5
401
views
rahul sharma 5
asked
Dec 10, 2017
Operating System
interrupts
co-and-architecture
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–
0
votes
1
answer
59
Operating system:- Interrupts
when the interrupt occurs ,then a: process switching may be there b: context saving must be there c: both a and b d.None of these
when the interrupt occurs ,thena: process switching may be thereb: context saving must be therec: both a and bd.None of these
rahul sharma 5
1.7k
views
rahul sharma 5
asked
Dec 7, 2017
Operating System
operating-system
interrupts
process-scheduling
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–
1
votes
1
answer
60
memory address saved on stack after interrupt
Consider that the memory is byte addressable with size 16 bits, and the program has been loaded starting from memory location (2000)10. What will be the return address saved in the stack, if an interrupt occurs while the CPU has been halted after executing the HALT instruction?
Consider that the memory is byte addressable with size 16 bits, and the program has been loaded starting from memory location (2000)10. What will be the return address sa...
Tuhin Dutta
2.9k
views
Tuhin Dutta
asked
Dec 2, 2017
CO and Architecture
co-and-architecture
interrupts
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