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Recent questions tagged io-handling
3
votes
4
answers
31
ISRO-2013-52
Suppose we have variable logical records of lengths of $5$ bytes, $10$ bytes and $25$ bytes while the physical block size in disk is $15$ bytes. What is the maximum and minimum fragmentation seen in bytes? $25$ and $5$ $15$ and $5$ $15$ and $0$ $10$ and $5$
Suppose we have variable logical records of lengths of $5$ bytes, $10$ bytes and $25$ bytes while the physical block size in disk is $15$ bytes. What is the maximum and m...
makhdoom ghaya
7.8k
views
makhdoom ghaya
asked
May 2, 2016
Operating System
isro2013
operating-system
io-handling
disk
+
–
0
votes
0
answers
32
MadeEasy Test Series: CO & Architecture - I/O Handling
Identify the false statements: S1: Separate I/O address space does not necessarily mean that I/O address lines are physically separated. S2: Address decoder is an essential part of I/O interface. a) Only S1 b) Only S2 c) Both S1 and S2 d) Neither S1 nor S2
Identify the false statements:S1: Separate I/O address space does not necessarily mean that I/O address lines are physically separated.S2: Address decoder is an essential...
Sandeep Singh
927
views
Sandeep Singh
asked
Jan 18, 2016
CO and Architecture
made-easy-test-series
co-and-architecture
io-handling
+
–
0
votes
2
answers
33
Direct memory access is used for high-speed I/O devices.
Direct memory access is used for high-speed I/O devices. Why this happens.what is co relation between speed of I/O and DMA transfer becoz anyway DMA is more efficient than other modes such as interrupt driven, so why its not efficient for slower I/O devices?
Direct memory access is used for high-speed I/O devices.Why this happens.what is co relation between speed of I/O and DMA transfer becoz anyway DMA is more efficient than...
Anurag_s
2.2k
views
Anurag_s
asked
Nov 18, 2015
CO and Architecture
co-and-architecture
io-handling
dma
+
–
0
votes
1
answer
34
bit rate of video terminal unit
what is bit rate of video terminal unit with 80 character/line , 8 bits/character and horizontal sweep time of 100 micro sec?
what is bit rate of video terminal unit with 80 character/line , 8 bits/character and horizontal sweep time of 100 micro sec?
monali
1.1k
views
monali
asked
Oct 7, 2015
Operating System
operating-system
io-handling
+
–
7
votes
3
answers
35
ISRO2009-78
On receiving an interrupt from an I/O device,the CPU Halts for a predetermined time Branches off to the interrupt service routine after completion of the current instruction Branches off to the interrupt service routine immediately Hands over control of address bus and data bus to the interrupting device
On receiving an interrupt from an I/O device,the CPUHalts for a predetermined timeBranches off to the interrupt service routine after completion of the current instructio...
ajit
7.0k
views
ajit
asked
Oct 5, 2015
CO and Architecture
isro2009
co-and-architecture
io-handling
+
–
15
votes
2
answers
36
GATE IT 2004 | Question: 11, ISRO2011-33
What is the bit rate of a video terminal unit with $80$ characters/line, $8$ $\text{bits/character}$ and horizontal sweep time of $100$ $\text{µs}$ (including $20$ $\text{µs}$ of retrace time)? $8$ $\text{Mbps}$ $6.4$ $\text{Mbps}$ $0.8$ $\text{Mbps}$ $0.64$ $\text{Mbps}$
What is the bit rate of a video terminal unit with $80$ characters/line, $8$ $\text{bits/character}$ and horizontal sweep time of $100$ $\text{µs}$ (including $20$ $\tex...
Ishrat Jahan
8.0k
views
Ishrat Jahan
asked
Nov 1, 2014
Operating System
gateit-2004
operating-system
io-handling
easy
isro2011
+
–
42
votes
2
answers
37
GATE IT 2006 | Question: 8
Which of the following DMA transfer modes and interrupt handling mechanisms will enable the highest I/O band-width? Transparent DMA and Polling interrupts Cycle-stealing and Vectored interrupts Block transfer and Vectored interrupts Block transfer and Polling interrupts
Which of the following DMA transfer modes and interrupt handling mechanisms will enable the highest I/O band-width?Transparent DMA and Polling interruptsCycle-stealing an...
Ishrat Jahan
13.0k
views
Ishrat Jahan
asked
Oct 31, 2014
Operating System
gateit-2006
operating-system
io-handling
dma
normal
+
–
33
votes
4
answers
38
GATE CSE 1996 | Question: 25
A hard disk is connected to a $50$ MHz processor through a DMA controller. Assume that the initial set-up of a DMA transfer takes $1000$ clock cycles for the processor, and assume that the handling of the interrupt at DMA completion requires $500$ ... What fraction of the processor time is consumed by the disk, if the disk is actively transferring $100\%$ of the time?
A hard disk is connected to a $50$ MHz processor through a DMA controller. Assume that the initial set-up of a DMA transfer takes $1000$ clock cycles for the processor, ...
Kathleen
10.3k
views
Kathleen
asked
Oct 9, 2014
CO and Architecture
gate1996
co-and-architecture
io-handling
dma
numerical-answers
normal
+
–
14
votes
2
answers
39
GATE CSE 1996 | Question: 1.24
For the daisy chain scheme of connecting I/O devices, which of the following statements is true? It gives non-uniform priority to various devices It gives uniform priority to all devices It is only useful for connecting slow devices to a processor device It requires a separate interrupt pin on the processor for each device
For the daisy chain scheme of connecting I/O devices, which of the following statements is true?It gives non-uniform priority to various devicesIt gives uniform priority ...
Kathleen
7.0k
views
Kathleen
asked
Oct 9, 2014
CO and Architecture
gate1996
co-and-architecture
io-handling
normal
+
–
30
votes
4
answers
40
GATE CSE 1996 | Question: 1.20, ISRO2008-56
Which of the following is an example of spooled device? A line printer used to print the output of a number of jobs A terminal used to enter input data to a running program A secondary storage device in a virtual memory system A graphic display device
Which of the following is an example of spooled device?A line printer used to print the output of a number of jobsA terminal used to enter input data to a running program...
Kathleen
11.1k
views
Kathleen
asked
Oct 9, 2014
Operating System
gate1996
operating-system
io-handling
normal
isro2008
+
–
16
votes
3
answers
41
GATE CSE 1997 | Question: 2.4
The correct matching for the following pairs is: ... $A-2\quad B-1\quad C-3\quad D-4$ $A-4\quad B-3\quad C-2\quad D-1$ $A-2\quad B-3\quad C-4\quad D-1$
The correct matching for the following pairs is:$$\begin{array}{ll} \text{(A) DMA I/O} & \text{(1) High speed RAM} \\ \text{(B) Cache} & \text{(2) Disk} \\ \text{(C) I...
Kathleen
7.7k
views
Kathleen
asked
Sep 29, 2014
CO and Architecture
gate1997
co-and-architecture
normal
io-handling
match-the-following
+
–
18
votes
4
answers
42
GATE CSE 1998 | Question: 1.29
Which of the following is an example of a spooled device? The terminal used to enter the input data for the C program being executed An output device used to print the output of a number of jobs The secondary memory device in a virtual storage system The swapping area on a disk used by the swapper
Which of the following is an example of a spooled device?The terminal used to enter the input data for the C program being executedAn output device used to print the outp...
Kathleen
4.7k
views
Kathleen
asked
Sep 25, 2014
Operating System
gate1998
operating-system
io-handling
easy
+
–
36
votes
4
answers
43
GATE CSE 2005 | Question: 20
Normally user programs are prevented from handling I/O directly by I/O instructions in them. For CPUs having explicit I/O instructions, such I/O protection is ensured by having the I/O instruction privileged. In a CPU with memory mapped I/ ... /O protection is ensured by a hardware trap I/O protection is ensured during system configuration I/O protection is not possible
Normally user programs are prevented from handling I/O directly by I/O instructions in them. For CPUs having explicit I/O instructions, such I/O protection is ensured by ...
Kathleen
11.5k
views
Kathleen
asked
Sep 22, 2014
Operating System
gatecse-2005
operating-system
io-handling
normal
+
–
45
votes
7
answers
44
GATE CSE 2005 | Question: 19
Which one of the following is true for a CPU having a single interrupt request line and a single interrupt grant line? Neither vectored interrupt nor multiple interrupting devices are possible Vectored interrupts are not possible ... and multiple interrupting devices are both possible Vectored interrupts are possible but multiple interrupting devices are not possible
Which one of the following is true for a CPU having a single interrupt request line and a single interrupt grant line?Neither vectored interrupt nor multiple interrupting...
Kathleen
21.2k
views
Kathleen
asked
Sep 22, 2014
Operating System
gatecse-2005
operating-system
io-handling
normal
+
–
41
votes
6
answers
45
GATE CSE 2008 | Question: 64, ISRO2009-13
Which of the following statements about synchronous and asynchronous I/O is NOT true? An ISR is invoked on completion of I/O in synchronous I/O but not in asynchronous I/O In both synchronous and asynchronous I/O, an ISR (Interrupt Service ... process waiting for the completion of I/O is woken up by the ISR that is invoked after the completion of I/O
Which of the following statements about synchronous and asynchronous I/O is NOT true?An ISR is invoked on completion of I/O in synchronous I/O but not in asynchronous I/O...
Kathleen
17.8k
views
Kathleen
asked
Sep 12, 2014
CO and Architecture
gatecse-2008
operating-system
io-handling
normal
isro2009
+
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