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Recent questions tagged logic
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1
Test Book digital logic
I think option A is also correct ! if we take minterm and complement it to get POS then option A can also be the answer
asked
Apr 9, 2019
in
Digital Logic
by
Shawn Frost
(
31
points)

81
views
digitallogic
logic
0
votes
1
answer
2
finding two positive integers in an array
I'm facing a problem these days, the question is saying the following: " Imagine we are having an array of positive integers called (a) and a variable called (k). Among this integers, we are looking for two numbers such that the sum of ... 6,2 in this case what would be the designing of the algorithm? Thank you all for your efforts, they worth a lot!
asked
Feb 4, 2019
in
Study Resources
by
miller
(
29
points)

114
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functions
logic
algorithms
+1
vote
0
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3
Digital Logic
A circuit outputs a digit in the form of 4 bits. 0 is represented by 0000, 1 by 0001, …, 9 by 1001. A combinational circuit is to be designed which takes these 4 bits as input and outputs 1 if the digit ≥ 5, and 0 otherwise. If only AND, OR and NOT gates may be used, what is the minimum number of gates required? 2 3 4 5
asked
Jan 22, 2018
in
Digital Logic
by
gauravkc
Loyal
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7.8k
points)

79
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digitallogic
logic
+4
votes
1
answer
4
Digital logic design
Explain each term in detailed
asked
Jan 14, 2018
in
Digital Logic
by
Harikesh Kumar
Junior
(
875
points)

454
views
digitallogic
logic
digitalcircuits
+2
votes
0
answers
5
Digital logic design
Provide the solution in detail
asked
Jan 14, 2018
in
Digital Logic
by
Harikesh Kumar
Junior
(
875
points)

94
views
digitallogic
digitalcircuits
logic
0
votes
0
answers
6
digital logic
Consider a clocked sequential circuit as shown in the figure below. Assuming initial state to be Q1 Q0 = 00 For an input sequence X = 1010, the respective output sequence will be _______.
asked
Dec 21, 2017
in
Digital Logic
by
Warlock lord
Active
(
3.3k
points)

122
views
digitallogic
digitalcircuits
logic
+3
votes
1
answer
7
Digital Logic Doubt
The number of minterms covered by Essential Prime Implicants in the function f(a,b,c,d)=Σ(1,2,4,5,6,7,8,9,10,11,12,15) is Answer is 0.While my answer is coming 2.
asked
Nov 11, 2017
in
Digital Logic
by
Sourajit25
Active
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1.7k
points)

345
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digitallogic
kmap
booleanalgebra
logic
0
votes
0
answers
8
Digital Logic  Decoder output volts
asked
Oct 19, 2017
in
Digital Logic
by
Garrett McClure
(
265
points)

116
views
digitallogic
digitalcircuits
logic
+1
vote
1
answer
9
digital logic
need help..!
asked
Oct 8, 2017
in
Digital Logic
by
air1ankit
Active
(
4.7k
points)

221
views
digitallogic
booleanalgebra
logic
digitalcircuits
+2
votes
1
answer
10
conversion digital logic
5421 bcd to natural code conversion explain >>
asked
Oct 6, 2017
in
Digital Logic
by
air1ankit
Active
(
4.7k
points)

207
views
digitallogic
booleanalgebra
logic
0
votes
2
answers
11
Digital Logic  Need help simplifying Boolean expression with DeMorgan's theorem.
asked
Oct 3, 2017
in
Digital Logic
by
Garrett McClure
(
265
points)

309
views
digitallogic
booleanalgebra
digitalcircuits
logic
+1
vote
1
answer
12
Digital Logic  Write out the boolean expression and draw the circuit that implements the function
asked
Sep 19, 2017
in
Digital Logic
by
Garrett McClure
(
265
points)

301
views
digitallogic
booleanalgebra
digitalcircuits
logic
0
votes
1
answer
13
Digital Systems  Logical Mismatch in Input & Output
asked
Sep 12, 2017
in
Digital Logic
by
Garrett McClure
(
265
points)

173
views
digitallogic
digitalcircuits
logic
0
votes
0
answers
14
Digital Systems  Logical Truth Tables with P.A.L. and N.A.L
asked
Sep 12, 2017
in
Digital Logic
by
Garrett McClure
(
265
points)

151
views
digitallogic
digitalcircuits
logic
+1
vote
3
answers
15
Digital logic
Minimum number of half adders and OR gates required to build a nbit binary adder is? (Give circuit diagram)
asked
Jul 16, 2017
in
Digital Logic
by
chandra sai
Active
(
1.3k
points)

465
views
digitallogic
logic
0
votes
2
answers
16
Discrete Mathematics
Determine whether (p ∧ ( p → q )) → q is Tautology , Contradiction or Contingency.
asked
Jun 26, 2016
in
Mathematical Logic
by
LavTheRawkstar
Active
(
3.8k
points)

106
views
discrete
logic
+5
votes
0
answers
17
GATE19916,b
Design a 1024 bit serialin/serialout unidirectional shift register using a 1K $\times$ 1 bit RAM with a data input $D_{in}$, data output $D_{out}$ and control input $\text{READ}/\overline{\text{WRITE}}$. You may assume the availability of standard SSI and MSI components such as gates, registers and counters.
asked
Nov 14, 2015
in
Digital Logic
by
ibia
Active
(
3.5k
points)

329
views
gate1991
digitallogic
logic
nongate
0
votes
2
answers
18
counting speed
what is the maximum counting speed of 4bit binary counter which is composed of flipflops with a propagation delay of 25ns?
asked
Oct 8, 2015
in
Digital Logic
by
lohith
(
57
points)

1.7k
views
digitallogic
logic
+1
vote
1
answer
19
boolean algebra
which of the following boolean algebra expression is incorrect ? a . (abc)' + bc + ac = c b . (a+b)(a'(b'+c'))' + b'c' + a'c' = 1 c . ab + a'c + bc = ab +ac d . ab + ac' = b guys can anyone solve this question... i am not finding the way how to solve this...
asked
Oct 6, 2015
in
Digital Logic
by
lohith
(
57
points)

771
views
digitallogic
logic
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