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Recent questions tagged logicgates
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1
Logic Gates and switching circuits
The gates G1 & G2 in the figure have propagation delays of 10ns and 20ns respectively. If the input Vi makes an abrupt change from logic 0 to 1 at time t=t0 , then what's the output waveform V0 is ? Also please explain how to handle such kinds of questions of waveform?
asked
1 day
ago
in
Digital Logic
by
Gitika Babbar
(
107
points)

11
views
digitallogic
logicgates
+1
vote
1
answer
2
Morris Mano Edition 3 Exercise 3 Question 11 (Page No. 112)
Draw the ANDOR gate implementation of the following function after simplifying it in (a) sum of products and (b) product of sums. F= (A,B,C,D) = $\sum (0,2,5,6,7,8,10)$
asked
Apr 1
in
Digital Logic
by
ajaysoni1924
Loyal
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9.4k
points)

19
views
digitallogic
booleanexpressions
simplification
kmap
logicgates
0
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0
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3
Morris Mano Edition 3 Exercise 2 Question 21 (Page No. 71)
TTL SSI comes mostly in 14pin packets. two pins are reserved for power and the other 12 pins are for inputoutput terminals. Determine the number of gates that can be enclosed in one package if it contains the following ... two input exclusiveOR gate three input AND gates Four input NAND Gates FIveinput NOR gates Eight input NAND gates
asked
Apr 1
in
Digital Logic
by
ajaysoni1924
Loyal
(
9.4k
points)

13
views
digitallogic
booleanexpressions
booleanalgebra
logicgates
0
votes
0
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4
Morris Mano Edition 3 Exercise 2 Question 22 (Page No. 71)
Show that a positive logic NAND gate is a negative Logic Nor Gate and vice versa.
asked
Apr 1
in
Digital Logic
by
ajaysoni1924
Loyal
(
9.4k
points)

16
views
digitallogic
booleanexpressions
booleanalgebra
logicgates
+3
votes
3
answers
5
GATE201930
Consider three $4$variable functions $f_1, f_2$, and $f_3$, which are expressed in sumofminterms as $f_1=\Sigma(0,2,5,8,14),$ $f_2=\Sigma(2,3,6,8,14,15),$ $f_3=\Sigma (2,7,11,14)$ For the following circuit with one AND gate and one XOR gate the output function $f$ can be expressed as: $\Sigma(7,8,11)$ $\Sigma (2,7,8,11,14)$ $\Sigma (2,14)$ $\Sigma (0,2,3,5,6,7,8,11,14,15)$
asked
Feb 7
in
Digital Logic
by
Arjun
Veteran
(
405k
points)

2.1k
views
gate2019
digitallogic
kmap
logicgates
0
votes
0
answers
6
MadeEasy Full Length Test 2019: Digital Logic  Logic Gates
asked
Jan 26
in
Digital Logic
by
screddy1313
(
455
points)

57
views
digitallogic
logicgates
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
7
NTA NET DEC 2018 Q 71
asked
Dec 25, 2018
in
Digital Logic
by
Sanjay Sharma
Boss
(
47.1k
points)

77
views
logicgates
+2
votes
1
answer
8
GATEBOOK2019DL11
When a $2$input NOR gate has all its input lines and output line inverted, it becomes: NAND gate EXNOR gate EXOR gate OR gate
asked
Oct 27, 2018
in
Digital Logic
by
GATEBOOK
Boss
(
11.4k
points)

112
views
gb2019dl1
digitallogic
logicgates
0
votes
0
answers
9
EX NOR Gate
$A\odot(BC) = (A\odot B)(A\odot C)$ Does it hold? Please solve.
asked
Sep 27, 2018
in
Digital Logic
by
Mizuki
Active
(
1.3k
points)

52
views
digitallogic
logicgates
0
votes
0
answers
10
General Topic Doubt Digital Logic: Min No Gates
What are the minimum number of nand or nor gates required for 2 bit adder ( ie. 4 input A,B,C,D) ?
asked
Jul 3, 2018
in
Digital Logic
by
adil.wadood
(
5
points)

251
views
digitallogic
paralleladder
combinationalcircuits
logicgates
generaltopicdoubt
0
votes
1
answer
11
General Topic Doubt Digital Logic: Min No Gates
Consider a $3bit$ number $A$ and $2 bit$ number $B$ are given to a multiplier. The output of multiplier is realized using $AND$ gate and onebit full adders. If the minimum number of $AND$ gates required are $X$ and onebit full adders required are Y, then $X+Y = $ _______
asked
May 31, 2018
in
Digital Logic
by
saumya mishra
Junior
(
907
points)

238
views
digitallogic
logicgates
digitalcircuits
generaltopicdoubt
combinationalcircuits
+2
votes
1
answer
12
[ACE test Serieis] DL
The answer given is B Shouldn't the answer be A ?
asked
Jan 18, 2018
in
Digital Logic
by
ashish pal
Junior
(
811
points)

95
views
digitallogic
logicgates
+2
votes
1
answer
13
MadeEasy Test Series: Digital Logic  Multiplexer
A 32 : 1 MUX has to be designed using a 16 : 1 MUX. It was found that for this task we require ‘X ’ number of 16 : 1 MUX and “Y ” number of two input OR gates, then the value of X + Y = __________.
asked
Dec 28, 2017
in
Digital Logic
by
ashish pal
Junior
(
811
points)

366
views
madeeasytestseries
digitallogic
multiplexer
logicgates
0
votes
1
answer
14
No of 2 input NOR gates
asked
Dec 6, 2017
in
Digital Logic
by
Parshu gate
Active
(
3.1k
points)

150
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digitallogic
normal
logicgates
0
votes
3
answers
15
UGCNETdec2008ii5
An example of a universal building block is: (A) EXOR gate (B) AND gate (C) OR gate (D) NOR gate
asked
Sep 25, 2017
in
Digital Logic
by
rishu_darkshadow
Loyal
(
6.9k
points)

319
views
ugcnetdec2008ii
digitallogic
logicgates
0
votes
1
answer
16
UGCNETdec2008ii4
Extremely low power dissipation and low cost per gate can be achieved in: (A) MOS ICs (B) C MOS ICs (C) TTL ICs (D) ECL ICs
asked
Sep 25, 2017
in
Digital Logic
by
rishu_darkshadow
Loyal
(
6.9k
points)

248
views
ugcnetdec2008ii
digitallogic
logicgates
+1
vote
1
answer
17
Digital Systems  Create an equivalent ANDOR expression
asked
Sep 15, 2017
in
Digital Logic
by
Garrett McClure
(
259
points)

104
views
digitallogic
digitalcircuits
logicgates
0
votes
1
answer
18
Digital Systems  Min/MaxTerm Expressions
From the following tables Two bits equality detector: x1 x2 y1 y2 f 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1 0 1 1 0 1 1 0 0 0 1 1 1 0 1 0 0 0 0 1 0 0 1 0 1 0 1 0 1 1 0 1 1 0 1 1 0 0 0 1 ... of the f output of two bits equlity detector. Write down the maxterm expression of the f output of the truth table below: x y f 0 0 0 0 1 1 1 0 0 1 1 1
asked
Sep 7, 2017
in
Digital Logic
by
Garrett McClure
(
259
points)

149
views
digitallogic
minsumofproductsform
logicgates
0
votes
1
answer
19
Exclusive NOR/OR Gates and Relationships
Consider the following tables: Exclusive OR: x y f = xy' + x'y 0 0 0 0 1 1 1 0 1 1 1 0 When x is constant 0, describe the relationship of the y input and the f output by using a Boolean equation: f = _________ When x is constant 1, describe ... 0 1 0 1 0 0 1 1 1 When f is 1 (high), describe the relationship between x and y using a Boolen equation: y = ______
asked
Sep 7, 2017
in
Digital Logic
by
Garrett McClure
(
259
points)

77
views
digitallogic
logicgates
0
votes
0
answers
20
Digital Logical(Xor and Xnor Gates)
1. Xor and xnor are same in case number of inputs of odd? 2.If above is yes,then why do we say these ae complement? 3.Are these associative and commutative for more than 2 i/p? 4.How do we correctly define them for more than 2 i/p?Is it just that exor checks odd no. of 1's and xnor checks even number of 1'a? 5.Why exnor is called as even function?
asked
Dec 21, 2016
in
Digital Logic
by
rahul sharma 5
Boss
(
24.2k
points)

164
views
digitallogic
logicgates
0
votes
2
answers
21
Simple Doubt in digital
Consider a simple OR gate with 2 inputs A and B, a ouput O which is taken back and reconnected to B as feedback. Now, A=0 and B=0 so O=0. If we give A=1 for like 1 sec , O=1 and now if we turn off the power from the circuit , 1.) will we get a infinite ... it and and O=1 (Assume a case when A=1,B=0 so O=1 , Now i quickly set A=0 , will this not automatically make B=1) ?
asked
Nov 27, 2016
in
Digital Logic
by
Aakash Das
Junior
(
525
points)

307
views
digitallogic
combinational
digitalcircuits
circuitoutput
logicgates
+2
votes
2
answers
22
UGCNETAUG2016III65
Which of the following 2 input Boolean logic functions is linearly inseparable ? (a) AND (b) OR (c) NOR (d) XOR (e) NOT XOR (a) and (b) (b) and (c) (c), (d) and (e) (d) and (e)
asked
Oct 4, 2016
in
Digital Logic
by
makhdoom ghaya
Boss
(
29.2k
points)

558
views
ugcnetaug2016iii
digitallogic
logicgates
+2
votes
0
answers
23
MadeEasy Workbook: Digital Logic  Logic Gates
Q consider the statements below: 1. if the output waveform an OR gate is same as the waveform at one of its inputs, the other input is being held permanently LOW. 2. if the output waveform an OR gate always HIGH, one of its inpit being held permanently HIGH . Find which statements which is always true???
asked
Oct 1, 2016
in
Digital Logic
by
Hradesh patel
Loyal
(
6.2k
points)

345
views
madeeasybooklet
digitallogic
logicgates
+3
votes
2
answers
24
Ace Page# 103, Q#09
A circuit which is working as NAND gate with positive level logic system will work as _____ gate with negative level logic system NAND NOR AND OR
asked
Sep 17, 2016
in
Digital Logic
by
Payal Rastogi
Junior
(
933
points)

377
views
digitallogic
logicgates
0
votes
1
answer
25
UGCNETJune2010II8
What is the transitive voltage for the voltage input of a CMOS operating from $10V$ supply ? $1V$ $2V$ $5V$ $10V$
asked
Sep 15, 2016
in
Digital Logic
by
makhdoom ghaya
Boss
(
29.2k
points)

513
views
ugcnetjune2010ii
digitallogic
logicgates
+1
vote
2
answers
26
UGCNETJune2010II6
The logic expression for the output of the circuit shown in the figure is $\bar{A} \bar{C}+ \bar{B}\bar{C}+CD$ $A\bar{C}+B\bar{C}+\bar{C}D$ $ABC + \bar{C}\bar{D}$ $\bar{A}\bar{B}+\bar{B}\bar{C}+\bar{C}\bar{D}$
asked
Sep 15, 2016
in
Digital Logic
by
makhdoom ghaya
Boss
(
29.2k
points)

535
views
ugcnetjune2010ii
digitallogic
logicgates
0
votes
1
answer
27
UGCNETDec2010II7
$AB + (\bar{A+B})$ is equivalent to $A \bigoplus B$ $A \bigodot B$ $(A \bigoplus B) \bigodot A$ $(A \bigodot B) \bigoplus A$
asked
Sep 5, 2016
in
Digital Logic
by
makhdoom ghaya
Boss
(
29.2k
points)

733
views
ugcnetdec2010ii
digitallogic
logicgates
+2
votes
2
answers
28
UGCNETSep2013II23
Which one of the following set of gates is best suited for ‘parity’ checking and ‘parity’ generation? AND, OR, NOT NAND, NOR EXOR, EXNOR None of the above
asked
Jul 20, 2016
in
Digital Logic
by
jothee
Veteran
(
96.1k
points)

901
views
ugcnetsep2013ii
digitallogic
logicgates
+2
votes
2
answers
29
UGCNETDec2012II49
Identify the operation which is commutative but not associative? OR NOR EXOR NAND
asked
Jul 11, 2016
in
Digital Logic
by
jothee
Veteran
(
96.1k
points)

2.4k
views
ugcnetdec2012ii
digitallogic
logicgates
+3
votes
1
answer
30
UGCNETDec2012II47
Match the following: a. TTL 1. High fan out b. ECL 2. Low propagation delay c. CMOS 3. High power dissipation a b c A 3 2 1 B 1 2 3 C 1 3 2 D 3 1 2
asked
Jul 11, 2016
in
Digital Logic
by
jothee
Veteran
(
96.1k
points)

698
views
ugcnetdec2012ii
digitallogic
logicgates
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